AD5433_15 Datasheet, PDF (8/29 Pages) Analog Devices – 8-/10-/12-Bit, High Bandwidth Multiplying DACs with Parallel Interface

Data Sheet
AD5424/AD5433/AD5445
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
I_OUT1 1
I_OUT2 2
GND 3
DB7 4
DB6 5
DB5 6
DB4 7
DB3 8
AD5424
(Not to Scale)
16 R_FB
15 ^VREF
14 V_DD
13 R/W
12 CS
11 DB0 (LSB)
10 DB1
9 DB2
GND 1
DB7 2
DB6 3
DB5 4
DB4 5
AD5424
TOP VIEW
(Not to Scale)
15 R/W
14 CS
13 NC
12 NC
11 NC
Figure 3. AD5424 Pin Configuration (TSSOP)
NOTES
1. NC = NO CONNECT.
2. THE EXPOSED PAD MUST BE CONNECTED TO AGND.
Figure 4. AD5424 Pin Configuration (LFCSP)
Table 4. AD5424 Pin Function Descriptions
Pin No.
TSSOP
LFCSP Mnemonic Description
1
19
IOUT1
DAC Current Output.
2
20
IOUT2
DAC Analog Ground. This pin should normally be tied to the analog ground of the system.
3
1
GND
Ground.
4 to 11
2 to 9 DB7 to DB0 Parallel Data Bits 7 to 0.
10 to 13 NC
No Internal Connection.
12
14
CS
Chip Select Input. Active low. Used in conjunction with R/W to load parallel data to the input
latch or to read data from the DAC register. Rising edge of CS loads data.
13
15
R/W
Read/Write. When low, use in conjunction with CS to load parallel data. When high, use with CS
to read back contents of DAC register.
14
16
VDD
Positive Power Supply Input. These parts can be operated from a supply of 2.5 V to 5.5 V.
15
17
VREF
DAC Reference Voltage Input Terminal.
16
18
RFB
DAC Feedback Resistor Pin. Establish voltage output for the DAC by connecting to external
amplifier output.
Not applicable
EPAD
Exposed Pad. The exposed pad must be connected to AGND.
Rev. D | Page 7 of 28