ADV7344 Datasheet, PDF (79/88 Pages) Analog Devices – Multiformat Video Encoder Six 14-Bit Noise Shaped Video DACs

ADV7344
HSYNC
VSYNC
PIXEL
DATA
PAL = 864 × CLOCK/2
NTSC = 858 × CLOCK/2
Cb Y
Cr
Y
Cb
PAL = 132 × CLOCK/2
NTSC = 122 × CLOCK/2
Figure 110. SD Timing Mode 2 Odd-to-Even Field Transition (Master/Slave)
Mode 3—Master/Slave Option (Subaddress 0x8A = X X X X X 1 1 0 or X X X X X 1 1 1)
In this mode, the ADV7344 accepts or generates horizontal sync and odd/even field signals. When HSYNC is high, a transition of the
field input indicates a new frame, that is, vertical retrace. The ADV7344 automatically blanks all normally blank lines as per CCIR-624.
HSYNC and VSYNC are output in master mode and input in slave mode on the S_VSYNC and S_VSYNC pins, respectively.
DISPLAY
VERTICAL BLANK
DISPLAY
522 523 524 525
1
2
3
4
5
6
7
8
HSYNC
FIELD
EVEN FIELD ODD FIELD
DISPLAY
VERTICAL BLANK
9
10
11
20
21
22
DISPLAY
260 261 262 263 264 265 266 267 268 269 270 271 272 273 274
HSYNC
FIELD
ODD FIELD EVEN FIELD
Figure 111. SD Timing Mode 3, NTSC
DISPLAY
VERTICAL BLANK
283 284 285
DISPLAY
622
623
624
625
1
2
3
4
5
HSYNC
FIELD
EVEN FIELD ODD FIELD
6
7
DISPLAY
VERTICAL BLANK
21
22
23
DISPLAY
309
310
311
312
313
314
315
316
317
318
319
320
HSYNC
FIELD
EVEN FIELD ODD FIELD
Figure 112. SD Timing Mode 3, PAL
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