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ADG752 Datasheet, PDF (7/8 Pages) Analog Devices – CMOS, Low Voltage RF/Video, SPDT Switch
Test Circuits
V1
S
D
VS
RON = V1/IDS
IDS
IS (OFF)
S
D
A
VS
VD
ADG752
S
D
NC
NC = NO CONNECT
ID (ON)
A
VD
Test Circuit 1. On Resistance
VDD
0.1␮F
VDD
S1
S2
D
VS
IN
GND
VDD
0.1␮F
Test Circuit 2. Off Leakage
Test Circuit 3. On Leakage
VIN
50%
50%
RL
300⍀
CL
35pF
VOUT
VOUT
GND
VS
90%
t ON
Test Circuit 4. Switching Times
90%
t OFF
VDD
VS
S1
D
S2
D2 RL
300⍀
IN
VIN
GND
CL
35pF
VIN
VOUT
0V
VOUT
0V
50%
50%
tD
50%
50%
tD
VDD
0.1␮F
Test Circuit 5. Break-Before-Make Time Delay, tD
VDD
0.1␮F
IN
VIN
VDD
S
D
GND
50⍀
NETWORK
ANALYZER
50⍀
VS
RL VOUT
50⍀
VOUT
OFF ISOLATION = 20 LOG VS
Test Circuit 6. Off Isolation
VDD
0.1␮F
NETWORK
ANALYZER
VOUT
RL
50⍀
50⍀
VS
VDD
S1
S2
D
IN
GND
CHANNEL-TO-CHANNEL
CROSSTALK
=
20
LOG
VOUT
VS
Test Circuit 7. Channel-to-Channel Crosstalk
IN
VIN
VDD
S
D
GND
NETWORK
ANALYZER
50⍀
VS
RL VOUT
50⍀
REV. 0
INSERTION LOSS = 20 LOG VOUT WITH SWITCH
VOUT WITHOUT SWITCH
Test Circuit 8. Bandwidth
–7–