ADCMP551_13 Datasheet, PDF (7/16 Pages) Analog Devices – Single Supply High Speed PECL/LVPECL Comparators

Data Sheet
ADCMP551/ADCMP552/ADCMP553
ADCMP551
12
13
15
16
Pin No.
ADCMP552
15
16
18
19
ADCMP553
7
Mnemonic
LEB
LEB
QB
QB
VCC
Function
One of Two Complementary Inputs for Channel B Latch Enable. In the compare
mode (logic low), the output tracks changes at the input of the comparator. In
the latch mode (logic high), the output reflects the input state just prior to the
comparator’s being placed in the latch mode. LEB must be driven in conjunction
with LEB.
One of Two Complementary Inputs for Channel B Latch Enable. In the compare
mode (logic low), the output tracks changes at the input of the comparator. In
the latch mode (logic high), the output reflects the input state just prior to the
comparator’s being placed in the latch mode. LEB must be driven in conjunction
with LEB.
One of Two Complementary Outputs for Channel B. QB is logic low if the analog
voltage at the noninverting input is greater than the analog voltage at the
inverting input (provided the comparator is in the compare mode). See the
description of Pin LEB for more information.
One of Two Complementary Outputs for Channel B. QB is logic high if the analog
voltage at the noninverting input is greater than the analog voltage at the
inverting input (provided the comparator is in the compare mode). See the
description of Pin LEB for more information.
Positive Supply Terminal.
Rev. A | Page 7 of 16