AD9142A Datasheet, PDF (7/73 Pages) Analog Devices – Multiple chip synchronization

AD9142A
Data Sheet
SPECIFICATIONS
DC SPECIFICATIONS
TMIN to TMAX, AVDD33 = 3.3 V, DVDD18 = 1.8 V, CVDD18 = 1.8 V, IOUTFS = 20 mA, maximum sample rate, unless otherwise noted.
Table 1.
Parameter
RESOLUTION
ACCURACY
Differential Nonlinearity (DNL)
Integral Nonlinearity (INL)
MAIN DAC OUTPUTS
Offset Error
Gain Error
Full-Scale Output Current
Output Compliance Range
Output Resistance
Gain DAC Monotonicity
Settling Time to Within ±0.5 LSB
MAIN DAC TEMPERATURE DRIFT
Offset
Gain
Reference Voltage
REFERENCE
Internal Reference Voltage
Output Resistance
ANALOG SUPPLY VOLTAGES
AVDD33
CVDD18
DIGITAL SUPPLY VOLTAGES
DVDD18
DVDD18 Variation over Operating
Conditions¹
POWER CONSUMPTION
2× Mode
NCO OFF
NCO ON
2× Mode
NCO OFF
NCO ON
4× Mode
NCO OFF
NCO ON
4× Mode
NCO OFF
NCO ON
4× Mode
NCO OFF
NCO ON
4× Mode
NCO OFF
NCO ON
Test Conditions/Comments
Min Typ
Max
16
±2.1
±3.7
With internal reference
Based on a 10 kΩ external resistor between FSADJ and AVSS
−0.001
−3.2
19.06
−1.0
0
+0.001
+2
+4.7
19.8
20.6
+1.0
10
Guaranteed
20
0.04
100
30
1.17
1.19
5
3.13 3.3
3.47
1.7
1.8
1.9
1.7
1.8
−2.5%
1.9
+2.5%
fDAC = 737.28 MSPS
fDAC = 983.04 MSPS
fDAC = 737.28 MSPS
fDAC = 983.04 MSPS
fDAC = 1228.8 MSPS
fDAC = 1474.56 MSPS
925
1217
1135
1520
852
1144
1040
1425
1230
1725
1405
1990
Unit
Bits
LSB
LSB
% FSR
% FSR
mA
V
MΩ
ns
ppm/°C
ppm/°C
ppm/°C
V
kΩ
V
V
V
V
mW
mW
mW
mW
mW
mW
mW
mW
mW
mW
mW
mW
Rev. A | Page 6 of 72