AD7303_15 Datasheet, PDF (7/16 Pages) Analog Devices – 2.7 V to 5.5 V, Serial Input, Dual Voltage Output 8-Bit DAC

V_DD = +5V
INTERNAL REFERENCE
T ^TA ^{= 25؇C}
2
SYNC
DAC A = NORMAL OPERATION←
DAC B INITIALLY IN POWER
DOWN
V_OUT B
1
DAC B EXITING
POWER DOWN
CH1 2V, CH2 5V, M 500ns
Figure 12. Exiting Power-Down
(Partial Power-Down)
7
6
5
4
V_DD = +5V
3
2
V_DD = +3V
1
0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
Figure 13. Supply Current vs.
Logic Input Voltage
AD7303
SYNC
1
V_OUT
V_DD = +5V
INTERNAL VOLTAGE
REFERENCE
10 LSB STEP CHANGE
T_A = 25؇C
2
CH1 5.00V, CH2 50.0mV, M 250ns
Figure 14. Small Scale Settling
Time
0.5
0.4
V_DD = +5V
INTERNAL REFERENCE
0.3
5kΩ 100pF LOAD
LIMITED CODE RANGE (10-245)
0.2 ^{TA = 25°C}
DAC A
0.1
0
–0.1
DAC B
–0.2
–0.3
–0.4
–0.5
0 32 64 96 128 160 192 224 255
Input Code (10 to 245)
Figure 15. Integral Linearity Plot
0.5
0.4
0.3
0.2
0.1 V_DD = +5V
0 ^{INTERNAL REFERENCE}
–0.1
–0.2
–0.3
–0.4
–0.5
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE – ؇C
Figure 16. Typical INL vs.
Temperature
0.5
0.4
0.3
0.2
0.1
0 ^{VDD = +5V}
INTERNAL REFERENCE
–0.1
–0.2
–0.3
–0.4
–0.5
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE – ؇C
Figure 17. Typical DNL vs.
Temperature
1.0
0.8
V_DD = +5V
0.6
0.4
0.2
0
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE – ؇C
Figure 18. Typical Internal Reference
Error vs. Temperature
500
400
VDD = +5.5V
V_IL AND V_IH = 0V OR V_DD
300
200
100
0
–50 –25
0 25 50 75 100 125 150
TEMPERATURE – ؇C
Figure 19. Power-Down Current vs.
Temperature
REV. 0
–7–