AD532KDZ Datasheet, PDF (7/17 Pages) Analog Devices – Internally Trimmed Integrated Circuit Multiplier

AD532
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Y₂
Y₁
V_OS
+V_S
AD532
TOP VIEW
Z
(Not to Scale)
GND
X₂
OUT
X₁
–V_S
Figure 3. 10-Lead Header Pin Configuration (H-10)
3 2 1 20 19
–V_S 4
NC 5
NC 6
NC 7
NC 8
AD532
TOP VIEW
(Not to Scale)
18 Y₂
17 NC
16 V_OS
15 _NC
14 GND
9 10 11 12 13
NC = NO CONNECT.
DO NOT CONNECT TO THIS PIN.
Figure 4. 20-Lead Leadless Chip Carrier Pin Configuration (E-20A)
Z1
14 +V_S
OUT 2
13 Y₁
–V_S 3 _AD532 12 Y₂
NC
4
TOP VIEW
(Not to Scale)
11
V_OS
NC 5
10 GND
NC 6
X₁ 7
9 X₂
8 NC
NC = NO CONNECT.
DO NOT CONNECT TO THIS PIN.
Figure 5. 14-Lead Side Braize DIP (D-14)
Table 3. 10 Lead Header Pin Function Descriptions
Pin No.
Mnemonic
Description
1
Y1
Y Multiplicand Input 1
2
+VS
Positive Supply Voltage
3
Z
Dual Purpose Input
4
OUT
Product Output
5
−VS
Negative Supply Voltage
6
X1
X Multiplicand Input 1
7
X2
X Multiplicand Input 2
8
GND
Common
9
VOS
Output Offset Adjust
10
Y2
Y Multiplicand Input 2
Rev. D | Page 6 of 16