OP-01_15 Datasheet, PDF (6/6 Pages) Analog Devices – INVERTING HIGH SPEED OPERATIONAL AMPLIFIER

OP-O1
SETTLING-TIME TEST CIRCUIT
TYPICAL APPLICATIONS
Settling time may be measured using the circuit shown
below. This circuit incorporates the "false sum node" tech:"
nique to produce accurate, repeatable results. For a 5V input
FAST VOLTAGE-OUTPUT D/A CONVERTER
step, 0.1% settling will be achieved when the false sum node
settles to within :t2.5mV of its final value. The oscilloscope
used for observation of the false sum node should have wide
MSB
LSB
bandwidth, fast overload recovery time, and be used with a
low capacity probe (:S:10pF, including strays). A Tektronix
7504 scope with a 7A11 probe orequivalent is suggested. The
pulse generator should have a 500 output impedance and be
capable of a 5V rise time in :S:20ns with ringing less than
2.5mV afterO.5J.LsM. easurements toO.1% require RINtOequal
RFwithin 0.01%; R5and R6are used as trimming resistors to
achieve this matching.
TYPICAL SETTLING
TIME 0.8",
4.7k!l
-=
6
0-10V
~
CL<;5OpF
I
VA TO SCOPE CIN = 10pF
, ¹ ,- RIN
0
.-
RF----.
O _150iHl%
B_{INPUT I Rl}
10kiJ A lOkiJ 150iHl%
.0.5% iO.5%
R2
I OUTPUT
S ^5kiJ
iO.5%
5kiJ
.0.5%
+15V
O ^RG
50iJ
R9
R3
~ 50iJi1%
6BOiH5%
2W
0.1"Fil0%
RL"
2kiJ
CL .;;
50pF
LETE _-=
-=
-=
-15V
-=
PRECISION POWER-BOOSTER CIRCUIT
+15V
240iJ
10kiJ
VIN
15kiJ
20kn
-=
2N2907
10kiJ
VOUT
RL
-=
-=
240iJ
OFFSET NULLING CIRCUIT
V+
TYPICAL PERFORMANCE,
SLEWRATE
~ 1BV/",
0.1% SETTLlNG
4", IRL "500121
OUIESCENT SUPPL Y CURRENT ---1.5mA
-15V
-=
V-
2-502 OPERATIONAL AMPLIFIERS
REV. A