ADUM1402ARWZ-RL Datasheet, PDF (6/32 Pages) Analog Devices – Quad-Channel Digital Isolators

ADuM1400/ADuM1401/ADuM1402
Data Sheet
ELECTRICAL CHARACTERISTICS—3 V, 105°C OPERATION¹
2.7 V ≤ VDD1 ≤ 3.6 V, 2.7 V ≤ VDD2 ≤ 3.6 V; all minimum/maximum specifications apply over the entire recommended operation range,
unless otherwise noted; all typical specifications are at TA = 25°C, VDD1 = VDD2 = 3.0 V. These specifications do not apply to ADuM1400W,
ADuM1401W, and ADuM1402W automotive grade versions.
Table 2.
Parameter
DC SPECIFICATIONS
Input Supply Current per Channel, Quiescent
Output Supply Current per Channel, Quiescent
ADuM1400 Total Supply Current, Four Channels²
DC to 2 Mbps
VDD1 Supply Current
VDD2 Supply Current
10 Mbps (BRW and CRW Grades Only)
VDD1 Supply Current
VDD2 Supply Current
90 Mbps (CRW Grade Only)
VDD1 Supply Current
VDD2 Supply Current
ADuM1401 Total Supply Current, Four Channels²
DC to 2 Mbps
VDD1 Supply Current
VDD2 Supply Current
10 Mbps (BRW and CRW Grades Only)
VDD1 Supply Current
VDD2 Supply Current
90 Mbps (CRW Grade Only)
VDD1 Supply Current
VDD2 Supply Current
ADuM1402 Total Supply Current, Four Channels²
DC to 2 Mbps
VDD1 or VDD2 Supply Current
10 Mbps (BRW and CRW Grades Only)
VDD1 or VDD2 Supply Current
90 Mbps (CRW Grade Only)
VDD1 or VDD2 Supply Current
For All Models
Input Currents
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
Logic Low Output Voltages
SWITCHING SPECIFICATIONS
ADuM140xARW
Minimum Pulse Width³
Maximum Data Rate⁴
Propagation Delay⁵
Pulse Width Distortion, |tPLH − tPHL|⁵
Change vs. Temperature
Propagation Delay Skew⁶
Channel-to-Channel Matching⁷
Symbol
IDDI (Q)
IDDO (Q)
Min
Typ Max Unit Test Conditions
0.26 0.31 mA
0.11 0.14 mA
IDD1 (Q)
IDD2 (Q)
IDD1 (10)
IDD2 (10)
IDD1 (90)
IDD2 (90)
1.2 1.9 mA DC to 1 MHz logic signal freq.
0.5 0.9 mA DC to 1 MHz logic signal freq.
4.5 6.5 mA 5 MHz logic signal freq.
1.4 2.0 mA 5 MHz logic signal freq.
37 65 mA 45 MHz logic signal freq.
11 15 mA 45 MHz logic signal freq.
IDD1 (Q)
IDD2 (Q)
IDD1 (10)
IDD2 (10)
IDD1 (90)
IDD2 (90)
1.0 1.6 mA DC to 1 MHz logic signal freq.
0.7 1.2 mA DC to 1 MHz logic signal freq.
3.7 5.4 mA 5 MHz logic signal freq.
2.2 3.0 mA 5 MHz logic signal freq.
30 52 mA 45 MHz logic signal freq.
18 27 mA 45 MHz logic signal freq.
IDD1 (Q), IDD2 (Q)
0.9 1.5 mA DC to 1 MHz logic signal freq.
I , I DD1 (10) DD2 (10)
3.0 4.2 mA 5 MHz logic signal freq.
I , I DD1 (90) DD2 (90)
24 39 mA 45 MHz logic signal freq.
IIA, IIB, IIC,
IID, IE1, IE2
VIH, VEH
VIL, VEL
VOAH, VOBH,
VOCH, VODH
VOAL, VOBL,
VOCL, VODL
−10
+0.01 +10 μA
1.6
V
0.4 V
(VDD1 or VDD2) − 0.1 3.0
V
(VDD1 or VDD2) − 0.4 2.8
V
0.0 0.1 V
0.04 0.1 V
0.2 0.4 V
0 V ≤ VIA, VIB, VIC, VID ≤ VDD1 or VDD2,
0 V ≤ VE1, VE2 ≤ VDD1 or VDD2
IOx = −20 μA, VIx = VIxH
IOx = −4 mA, VIx = VIxH
IOx = 20 μA, VIx = VIxL
IOx = 400 μA, VIx = VIxL
IOx = 4 mA, VIx = VIxL
PW
1
tPHL, tPLH
50
PWD
tPSK
tPSKCD/tPSKOD
1000 ns CL = 15 pF, CMOS signal levels
Mbps CL = 15 pF, CMOS signal levels
75 100 ns CL = 15 pF, CMOS signal levels
40 ns CL = 15 pF, CMOS signal levels
11
ps/°C CL = 15 pF, CMOS signal levels
50 ns CL = 15 pF, CMOS signal levels
50 ns CL = 15 pF, CMOS signal levels
Rev. H | Page 6 of 32