ADG513BRZ-REEL7 Datasheet, PDF (6/12 Pages) Analog Devices – LC2MOS Precision 5 V/3 V Quad SPST Switches

ADG511/ADG512/ADG513
PIN CONFIGURATION
(DIP/SOIC)
IN1 1
16 IN2
D1 2
S1 3
15 D2
ADG511
ADG512 ^{14 S2}
V_SS 4 ^ADG513 13 V_DD
GND
5
TOP VIEW
(Not to Scale) ^{12 NC}
S4 6
11 S3
D4 7
10 D3
IN4 8
9 IN3
NC = NO CONNECT
Truth Table (ADG511/ADG512)
ADG511
In
0
1
ADG512
In
1
0
Switch
Condition
ON
OFF
Truth Table (ADG513)
Logic
0
1
Switch
1, 4
OFF
ON
Switch
2, 3
ON
OFF
TERMINOLOGY
V_DD
V_SS
GND
S
D
IN
R_ON
I_S (OFF)
I_D (OFF)
I_D, I_S (ON)
V_D (V_S)
C_S (OFF)
C_D (OFF)
C_D, C_S (ON)
t_ON
t_OFF
t_D
Crosstalk
Off Isolation
Charge Injection
Most Positive Power Supply Potential.
Most Negative Power Supply Potential in
dual supplies. In single supply applications,
it may be connected to GND.
Ground (0 V) Reference.
Source Terminal. May be an input or output.
Drain Terminal. May be an input or output.
Logic Control Input.
Ohmic Resistance between D and S.
Source Leakage Current with the switch
“OFF.”
Drain Leakage Current with the switch
“OFF.”
Channel Leakage Current with the switch
“ON.”
Analog Voltage on terminals D, S.
“OFF” Switch Source Capacitance.
“OFF” Switch Drain Capacitance.
“ON” Switch Capacitance.
Delay between applying the digital control
input and the output switching on.
Delay between applying the digital control
input and the output switching off.
“OFF” or “ON” time measured between the
90% points of both switches when switching
from one address state to another.
A measure of unwanted signal which is
coupled through from one channel to
another as a result of parasitic capacitance.
A measure of unwanted signal coupling
through an “OFF” switch.
A measure of the glitch impulse transferred
from the digital input to the analog output
during switching.
–6–
REV. C