AD9889A_15 Datasheet, PDF (6/12 Pages) Analog Devices – High Performance HDMI/DVI Transmitter

AD9889A
Pin No.
F9
F10
E10
E9
G9
G10
Mnemonic
SDA
SCL
MDA
MCL
DDCSDA
DDCSCL
Type¹
C²
C²
C²
C²
C²
C²
Description
Serial Port Data I/O. This pin serves as the serial port data I/O slave for register access. Supports
CMOS logic levels from 1.8 V to 3.3 V.
Serial Port Data Clock. This pin serves as the serial port data clock slave for register access. Supports
CMOS logic levels from 1.8 V to 3.3 V.
Serial Port Data I/O Master to HDCP Key EEPROM. Supports CMOS logic levels from 1.8 V to 3.3 V.
Serial Port Data Clock Master to HDCP Key EEPROM. Supports CMOS logic levels from 1.8 V to 3.3 V.
Serial Port Data I/O to Receiver. This pin serves as the master to the DDC bus. 5 V CMOS logic level.
Serial Port Data Clock to Receiver. This pin serves as the master clock for the DDC bus. 5 V CMOS
logic level.
1 _{I = input, O = output, P = power supply, C = control.}
2 _{For a full description of the 2-wire serial interface and its functionality obtain documentation by contacting NDA from [e-mail].}
Rev. 0 | Page 6 of 12