AD7912 Datasheet, PDF (6/32 Pages) Analog Devices – 2-Channel, 2.35 V to 5.25 V, 1 MSPS, 10-/12-Bit ADCs

AD7912/AD7922
Parameter
LOGIC OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
Floating-State Leakage Current
Floating-State Output Capacitance³
Output Coding
CONVERSION RATE
Conversion Time
Track-and-Hold Acquisition Time²
Throughput Rate
POWER REQUIREMENTS
VDD
IDD
Normal Mode (Static)
Normal Mode (Operational)
Full Power-Down Mode (Static)
Full Power-Down Mode (Dynamic)
Power Dissipation⁴
Normal Mode (Operational)
Full Power-Down
A Grade¹
Unit
Test Conditions/Comments
VDD − 0.2
V min
0.2
V max
±0.3
µA max
5
pF max
Straight (natural) binary
ISOURCE = 200 µA; VDD = 2.35 V to 5.25 V
ISINK = 200 µA
888
ns max
16 SCLK cycles with SCLK at 18 MHz
290
ns max
1
MSPS max See the Serial Interface section
2.35/5.25
3
1.5
4
2
1
0.5
0.28
V min/max
mA typ
mA typ
mA max
mA max
µA max
mA typ
mA typ
Digital I/Ps = 0 V or VDD
VDD = 4.75 V to 5.25 V, SCLK on or off
VDD = 2.35 V to 3.6 V, SCLK on or off
VDD = 4.75 V to 5.25 V, fSAMPLE = 1 MSPS
VDD = 2.35 V to 3.6 V, fSAMPLE = 1 MSPS
SCLK on or off, typically 50 nA
VDD = 5 V, fSCLK = 18 MHz, fSAMPLE = 100 kSPS
VDD = 3 V, fSCLK = 18 MHz, fSAMPLE = 100 kSPS
20
mW max
VDD = 5 V, fSAMPLE = 1 MSPS
6
mW max
VDD = 3 V, fSAMPLE = 1 MSPS
5
µW max
VDD = 5 V
3
µW max
VDD = 3 V
1 _{Operational from VDD = 2 V, with VIH = 1.9 V minimum and VIL = 0.1 V maximum.}
2 _{See the Terminology section.}
3 _{Guaranteed by characterization.}
4 _{See the Power vs. Throughput Rate section.}
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