AD7656_15 Datasheet, PDF (6/32 Pages) Analog Devices – 250 kSPS, 6-Channel, Simultaneous

AD7656/AD7657/AD7658
Data Sheet
Parameter
LOGIC OUTPUTS
Output High Voltage (VOH)
Output Low Voltage (VOL)
Floating-State Leakage Current
Floating-State Output Capacitance³
Output Coding
CONVERSION RATE
Conversion Time
Track-and-Hold Acquisition Time^{2, 3}
Throughput Rate
POWER REQUIREMENTS
VDD
VSS
AVCC
DVCC
VDRIVE
ITOTAL
Normal Mode (Static)
(Includes IAVCC, IVDD, IVSS, IVDRIVE, IDVCC)
Normal Mode (Operational)
(Includes IAVCC, IVDD, IVSS, IVDRIVE, IDVCC)
ISS (Operational)
IDD (Operational)
Partial Power-Down Mode
Full Power-Down Mode (STBY Pin)
Power Dissipation
Normal Mode (Static)
Normal Mode (Operational)
Partial Power-Down Mode
Full Power-Down Mode (STBY Pin)
B Version¹ Y Version¹ Unit
Test Conditions/Comments
VDRIVE − 0.2 VDRIVE − 0.2
0.2
0.2
±1
±1
10
10
Twos complement
V min
V max
µA max
pF max
ISOURCE = 200 µA
ISINK = 200 µA
3.1
3.1
µs max
550
550
ns max
250
250
kSPS
Parallel interface mode only
5/15
−5/−15
5
5
3/5
28
26
0.25
0.25
7
80
143
140
35
100
5/15
−5/−15
5
5
3/5
28
26
0.25
0.25
7
80
143
140
35
100
V nom min/max
V nom min/max
V nom
V nom
V nom min/max
mA max
mA max
mA max
mA max
mA max
µA max
mW max
mW max
mW max
µW max
For 4 × VREF range, VDD = 10 V to 16.5 V
For 4 × VREF range, VDD = −10 V to −16.5 V
Digital I/PS = 0 V or VDRIVE
AVCC = DVCC = VDRIVE = 5.25 V, VDD = 16.5 V,
VSS = −16.5 V
fSAMPLE = 250 kSPS, AVCC = DVCC = VDRIVE = 5.25 V,
VDD = 16.5 V, VSS = −16.5 V
VSS = −16.5 V, fSAMPLE = 250 kSPS
VDD = 16.5 V, fSAMPLE = 250 kSPS
AVCC = DVCC = VDRIVE = 5.25 V, VDD = 16.5 V,
VSS = −16.5 V
SCLK on or off, AVCC = DVCC = VDRIVE = 5.25 V,
VDD = 16.5 V, VSS = −16.5 V
AVCC = DVCC = VDRIVE = 5.25 V, VDD = 16.5 V,
VSS = −16.5 V
fSAMPLE = 250 kSPS
1 _{Temperature ranges are as follows: B version is −40°C to +85°C and Y version is −40°C to +125°C.}
2 _{See the Terminology section.}
3 _{Sample tested during initial release to ensure compliance.}
Rev. D | Page 6 of 32