ADT7462 Datasheet, PDF (58/92 Pages) Analog Devices – Flexible Temperature and Voltage Monitor and System Fan Controller

ADT7462
The assertion time as a percentage of the time window is stored
in the THERM % on-time registers. This is a cumulative sum of
the percentage of time during the THERM timer window that
THERM is asserted. The % on-time and associated timer limit
registers are listed in Table 32.
Table 32. THERM On-Time and Timer Limit Register
Channel % On-Time Register % Timer Limit Register
THERM1 0xAE
0x80
THERM2 0xAF
0x81
Once the measured percentage exceeds the corresponding per-
centage limit, the THERM % bit in Thermal Status Register 2
gets asserted, and an ALERT is generated (that is, if the mask bit
is not set). If the limit is set to 0x00, an ALERT is generated on
the first assertion. If the Limit is set to FFh, an ALERT is never
generated because 0xFF corresponds to the THERM input
being asserted all the time.
When THERM is configured as an input only, setting Bits [1:4]
of the THERM zone in THERM1 configuration register (0x0E)
and THERM2 configuration register (0x0F) allows Pin 7 to
operate as an I/O.
THERM % Limit Register
The THERM % limit is programmed to Register 0x80 and
Register 0x81. If the THERM is asserted for longer than the
programmed percentage limit, then an ALERT is generated.
The limit is programmed as a percentage of the chosen THERM
timer window.
Example:
The THERM timer window is eight seconds, and an ALERT
should be generated if the THERM is asserted for more than
one second.
%Limit = ¹ × 100 = 12.5%
8
The THERM % limit register is an 8 bit register.
0x00 = 0% 0xFF = 100%
Therefore, 1 LSB = 0.39%
12.5% _{= 32dec = 0x20 = 00100000}
0.39%
Once the time window has elapsed, if the THERM limit has
been exceeded, then an ALERT is generated.
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