ADF7021_15 Datasheet, PDF (55/62 Pages) Analog Devices – High Performance Narrow-Band Transceiver IC

Data Sheet
REGISTER 8—POWER-DOWN TEST REGISTER
ADF7021
Rx_RESET
CONTROL
BITS
DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
CR1
PD7 SW1 LE1 PD6 PD5 PD4 PD3
PD1 C4 (1) C3 (0) C2 (0) C1 (0)
CR1 COUNTER RESET
0 NORMAL
1 RESET
CDR
RESET
DEMOD
RESET
PD7 PA (Rx MODE)
0 PA OFF
1 PA ON
SW1 Tx/Rx SWITCH
0 DEFAULT (ON)
1 OFF
LE1 LOG AMP ENABLE
0 LOG AMP OFF
1 LOG AMP ON
PD1 SYNTH STATUS
0 SYNTH OFF
1 SYNTH ON
PD3 LNA/MIXER ENABLE
0 LNA/MIXER OFF
1 LNA/MIXER ON
PD4 FILTER ENABLE
0 FILTER OFF
1 FILTER ON
PD5 ADC ENABLE
0 ADC OFF
1 ADC ON
PD6 DEMOD ENABLE
0 DEMOD OFF
1 DEMOD ON
Figure 70. Register 8—Power-Down Test Register Map
It is not necessary to write to this register under normal
operating conditions.
For a combined LNA/PA matching network, always set DB11 to
0, which enables the internal Tx/Rx switch. This is the power-
up default condition.
Rev. C | Page 55 of 62