AD7770_17 Datasheet, PDF (50/98 Pages) Analog Devices – 8-Channel, 24-Bit, Simultaneous Sampling ADC

Data Sheet
The SAR ADC has a maximum throughput rate of 256 kSPS.
The CONVST_SAR pin initiates a conversion on the SAR ADC.
The maximum allowable frequency of the CONVST_SAR pin is
256 kHz. If consecutive conversions are performed in the SAR
ADC, read back the result from the previous conversion before
a new conversion is generated. Otherwise, the results are
corrupted.
The SAR ADC is only available in SPI control mode. To read
conversion results from the SAR ADC, set the SAR_DIAG_
MODE_EN bit. After this bit is set, all data shifted out from the
SDO pin originates from the SAR ADC conversion, as shown in
Figure 105.
The CONVST_SAR signal can be internally deglitched to avoid
false triggers.
Table 30. SAR Synchronization and Deglitching
CONVST_DEGLITCH_DIS
(Register 0x013, Bits[7:6]) Effect on CONVST_SAR
11
CONVST_SAR goes directly to the SAR
10
CONVST_SAR reaches the SAR when
it is 1.5/MCLK cycles wide
Increase the acquisition time by 1.5/MCLK when the deglitch
circuitry is enabled.
Prior to the SAR ADC, the AD7770 contains an internal
multiplexer. This multiplexer can be configured over the SPI to
set the inputs to the SAR ADC to be either internal circuit
nodes (in the case of diagnostics) or to select the external
AUXAIN+ and AUXAIN− pins.
Along with converting external voltages, the SAR ADC can monitor
the internal nodes on the AVDD, IOVDD, and DGND pins and
the DLDO and analog LDO (ALDO) outputs. Some voltages
are internally attenuated by 6, and the resulting voltage is
applied to the SAR ADC, as shown in Table 31. This
attenuation is useful because variations in the power supply
voltage can be monitored.
The input multiplexer of the SAR is controlled by the GLOBAL_
MUX_CONFIG register, and the different inputs available are
described in Table 31.
The SAR ADC also contains an SAR driver amplifier, as shown
in Figure 106. This amplifier settles the SAR input to 12-bit
accuracy within the t33 time. This driver amplifier helps
minimize the kickback from the SAR converter to the global
diagnostic mux input circuit nodes.
AD7770
Use the auxiliary inputs, AUXAIN+ and AUXAIN−, to validate
the Σ-Δ measurements. While operating in SPI control mode,
the AD7770 has three available GPIOx ports controlled via the
SPI. The GPIOx pins can be used to control an external, dual
8:1 multiplexer, which, in turn, samples the eight Σ-Δ channels.
Use this diagnostic in applications where functional safety is
required. This diagnostic aids in removing the need for a
secondary external ADC to validate primary measurements
on the Σ-Δ channels.
Temperature Sensor
The internal die temperature can be measured with an accuracy
of ±2°C. The differential voltage base emitter (DVBE) is
proportional to the temperature measured referred to 25°C.
Temperature (°C) = ^{DVBE − 0.6 V}
2 mV
Table 31. SAR Mux Inputs
SAR
Input
Positive
Signal
Negative
Signal
0
AUXAIN+
AUXAIN−
1
DVBE
AVSSx
2
REF1+
REF1−
3
REF2+
REF2−
4
REF_OUT
AVSSx
5
VCM
AVSSx
6
AREG1CAP AVSSx
7
AREG2CAP AVSSx
8
DREGCAP
DGND
9
AVDD1A
AVSSx
10
AVDD1B
AVSSx
11
AVDD2A
AVSSx
12
AVDD2B
AVSSx
13
IOVDD
DGND
14
AVDD4
AVSSx
15
DGND
AVSSx
16
DGND
AVSSx
17
DGND
AVSSx
18
AVDD4
AVSSx
19
REF1+
AVSSx
20
REF2+
AVSSx
21
AVSSx
AVDD4
Attenuation ÷ 6
No
No
No
No
No
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
Yes
Yes
Yes
Yes
No
No
Yes
CS
SDI
SDO
SET BIT 5
GENERAL_USER_CONFIG_2 REG
WRITE TO ADC MUX REGISTER
ADC CONVERSION RESULT REG
WRITE TO ADC MUX REGISTER
ADC CONVERSION RESULT REG
Figure 105. Configuring the AD7770 to Operate the SPI to Read from the SAR ADC
Rev. C | Page 49 of 97