UG-042 Datasheet, PDF (5/8 Pages) Analog Devices – Evaluating the 16-Lead SOIC and the 16-Lead QSOP Digital Isolators

EVAL-ADuMQSEBZ User Guide
DATA INPUT/OUTPUT CONNECTIONS
Side 1 Data Input/Output
Signals can be provided to the evaluation board and routed to
the required input pins through the IO_1C terminal block
connector, as shown in Figure 4. Four channel inputs/outputs can
be connected from IO_1C Pin 3 through IO_1C Pin 6 to the
respective A, B, C, and D channels of the ADuM540x.
Signals from the IO_1C terminal block connector channels can
also be routed to some of the other data lines through the JP1A
and JP1B jumper blocks (these jumper blocks correspond to
BNC Channel A and Channel B, if you populate them). Each
jumper block allows a channel signal from the IO_1C terminal
block to be connected to additional data input lines by configuring
the jumpers. The jumper blocks can also be used to wrap
signals from an iCoupler output back to an input by using the
JP1A or JP1B block to cross-connect inputs and outputs.
A common way to provide signals is with a function generator
through 50 Ω coax cables. The evaluation board has a layout
position at IO_1A and IO_1B for adding two BNC connectors,
but these are not provided with the evaluation board. The Tyco
AMP 227699-2 coax cables can be purchased to populate these
BNC connectors. In addition, to have 50 Ω terminations on the
evaluation board for the added BNC connectors, add a 50 Ω
through-hole resistor at the R1 and R2 positions. It is possible to
route data outputs to this connector as well; however, it is not
recommended because proper termination is not possible for
logic level signals, and improper termination can cause severe
ringing on the output lines.
The Side 1 input/output structure also includes pull-up/pull-
down/load positions, R7 through R14. Discrete through-hole
resistors and capacitors can be installed at these positions to
simulate most loading conditions or to provide pull-ups for
open collector outputs.
Side 2 Data I/O
Signals can be provided to the evaluation board and routed to
the required input pins through the IO_1D terminal block
connector, as shown in Figure 5. It consists of terminal block
connections that operate like the Side 1 structures. The terminal
block connections can also be used to wrap signals from an
iCoupler output back to an input.
In addition to the off-board input/output connections, each
data channel is provided with through-hole connections to the
design area.
UG-042
DESIGN AREA
The design area of the evaluation board allows breadboarding
of application components such as RS-485 and controller area
network (CAN) transceiver, analog-to-digital converter (ADC),
or digital-to-analog converter (DAC) components with direct
interconnects. The design area, as shown in Figure 6, accepts
most surface-mount narrow- and wide-body components with
50 mil and 100 mil pitch, as well as narrow- and wide-body
300 mil DIP through-hole devices. These surface-mount discrete
components and jumper wires can complete a wide variety of
circuits.
The design area has convenient connection points to the
primary data path, CHA to CHD, of the iCoupler, as well as
power connections for VISO and GNDISO. To allow signals from
the design area to be routed to the IO_1D terminal block,
remove the 0 Ω resistors for R23 through R26. Note that no
ground plane is provided in the design area.
V_ISO
Z6
GND_ISO
Z7
DESIGN AREA
CHA
CHB
CHC
CHD
CHA
CHB
CHC
R23
R24
R25
R26
CHD
V_ISO
Figure 6. Design Area
IO_1D
1
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