SHA1144_15 Datasheet, PDF (5/6 Pages) Analog Devices – HIGH RESOLUTION 14 BIT SAMPLE AND HOLD AMPLIFIER

GENERAL DESCRIPTION
may be removed and the SHA MODE CONT~OL may be driv-
High resolution, high speed data acquisition demands that con-
siderable thought be given to wiring connections, even when
en in accordance with the option chart.
Offset Calibration
simply evaluating the unit in a temporary laboratory bench
set-up. To assist with such evaluations, an AC1580 is available.
This 4 1/2" X 6" printed circuit card has sockets that allow a
SHA1144 and ADCl130 or ADCl131 to be plugged directly
For the 0 to +10V unipolar range set the input voltage pre-
cisely to +0.0003V. Adjust the zero potentiometer until the
converter is just on the verge of switching from 00. . . . . 0
to 00.. . . . 1.
onto it. It also has provisions for two optional Harris HI508A
multiplexers. This card includes gain and offset adjustment
potentiometers and power supply bypass capacitors. It mates
with a Cinch 251-22-30-160 (or equivalent) edge connector
(PO and Cinch 251-06-30-160 (or equivalent) edge connector
(P2) which are supplied with every card.
For the +5V bipolar range, set the input voltage precisely to
-4.9997V: for :t10V units set it to -9.9994V. Adjust the zero
potentiometer until offset binary coded units are just on the
verge of switching from 00 . . . . . 0 to 00 . . . . . 1 and two's
complement coded units are just on the verge of switching
from100
0to100
1.
OBSOLETE To use the AC1580, program as shown in the wiring chart of
Table 1, by installing the appropriate jumpers. An ou tline
drawing and schematic are provided for reference.
Calibration Procedure
Set up the SHA1144 for the desired gain per the wiring chart
of Table 1. Short W9 which drives the SHA MODE CONTROL
with the STATUS of the ADc. Calibrate offset and gain in the
manner described below. When calibration is completed W9
Pl
I.
37
~~~~~ U
STATUSY
I
I
43
44
BIT 141LSBI 3
36
35
:W6
34
BIT 13 2
I 46
33
4B
BIT 12 N
32
I 50
30
BIT 11 M
BIT 10 L
BIT 9 K
BIT B J
52
29
M1
I 54 ADC1130/1131 27
I
56
125
Gain Calibration
Set the input voltage precisely to +9.9991V for 0 to +10V
units, +4.9991V for :t5V units or +9.9982V for :t10V units.
Note that these values are 1 1I2LSB's less than the nominal
full scale. Adjust the gain potentiometer until binary and off-
set binary coded units are just on the verge of switching from
11 . . . . 0 to 11 . . . . 1 and two's complement coded units
are just on the verge of switching from 011 . . . 10 to 011 . . . 11.
Pl
I
R CLOCK OUTPUT
P CLOCK INPUT
V CONVERT COMMAND
Z STATUS
S SERIAL OUTPUT
-I 15 DIGITAL GND
T +5V
17 +15V
16 -15V
! W9
BIT 7 H ^I~
23
20 GND SENSE
Pl
61
BIT 6 F
BIT 5 E
BIT 4 0
BIT 3 C
MSB 1
BIT 2 B
BIT 1 (MSBI
I
: Wl0
K
RW3
.-'v"v-,
11
4-
10
M2
SHA1144 9
8
I
DIGITAL
15 GND
W8 I
MODE
mo-r-o 9 CONTROL
I
I
16 -15V
17 +15V
ADD~~S~
ADD~E~~
ADD~E~~
ADD~~S~
P2
I
I
1 I"
I
2_I
I
3_I
4 ~I z
I
+15V
2
1
R3
lOOk
OFFSET
+15V
W16
-15V
P2
I
15
4
5
16
6
'111
7
IHI50BAI 12
11
10
9
W7
: _-W₀1_' 2,0
W15'
W13
:=w_:J: _-<>~'
P2
06
ANALOG
5 ANALOG
PI
18 ANALOG
INPUT
GND
INPUT
W14'0
I 019 ANALOG GND
A INCH 1
B IN CH 2
C IN CH 3
0 IN CH 4
E IN CH 5
F IN CH 6
H IN CH 7
J IN CH B
84
5
16
6
S2
7
15 ^{(HI50BA) 12}
11
10
3 14 13
9
- -15V +15V
K IN CH 9
L IN CH 10
MINCH 11
N IN CH 12
9 IN CH 13
10 IN CH 14
11 IN CH 16
12 IN CH 16
Figure 11. Schematic and Pin Designations
-5-