HOS-050_15 Datasheet, PDF (5/7 Pages) Analog Devices – FAST SETTLING VIDEO OPERATIONAL AMPLIFIERS

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Assume:!:Ycc = :!: ISY; ~AIN = 9OO!l;Gain Adjust = ^IOO!l;
(he desired change on the output = :!: I volt.
tinder (hese conditions, ROFFSETwill be ISk!l:
( ⁾ R_OI.^._FSEf^.
-
-
-
ISY x [900 + 100]
IY
) ^IISkY
ROFFSET = - \---rv-
ROFFSET = IS,ooon
Figure 4 shows bipolar output operation. If unipolar output is
desired, the appropriate Ycc should be removed from the Offset
Adjus( potentiometer.
settling time. They include (1) propogation delay through the
amplifier; (2) slewing time to approach the final output value;
(3) the time of recovery from the overload associated with slewing;
and (4) linear settling to withIn the specified error band.
Expressed in these terms, the measurement of settling time is
obviously a challenge and needs to be done accurately to assure
the user that the amplifier is worth consideration for his
application.
Figure 6 is the test circuit for measuring settling time to 0.1%.
This method creates a "false" summing junction and the error
band is observed at that point.
--
R,.
The 0.1 f.lF capacitor attached to the wiper arm of the Offset
I
Adjust control isolates the control and helps prevent adjustment
'..
OBSOLETE ^{noise from appearing on the output of the HOS-OSO.}
CFScan be any value between 0 and 20pF, depending on the
value of RGAIN;and should be selected to optimize settling time
for the particular circuit layout in which the HOS-OSOis being
used.
The Gain Adjust control should be a low value, low inductance
cermet trimming potentiometer.
Note: RFF, RGAIN,CFB and ROFFSETmust be located as close to
the summing node of the HOS-USOas physically possible. This
heIps prevent additional capacitance in the summing node and
corresponding bad effects on frequency response and settling
times.
Variable controls (such as Offset Adjust and Gain Adjust) should
never be tied to the summing node of the op amp. Their correct
eIectricallocations are those shown in Figure 4.
325
SUMMING NOD' 'R.OR .
OUTPUTERROR [.;':
...1
- IS.
Figure 6. Settling Time Test Circuit for O.1% Settling
If one were to attempt the measurement at the "true" summing
junction of the op amp, the results would be misleading. All
scope probes will add capacitance to the input and will change
the response of the system. Making the measurement at the
output of the amplifier is also impractical, since scope nonlinearities
and reading inaccuracies caused by overdriving the scope preclude
accurate measurements to the tolerances which are required.
The false summing junction method causes the amplifier to
subtract the output from the input; only one-half the actual
300
error appears at the false junction, and it can be measured to
275
the required accuracies.
250
225
rJj
Q 200
z
0
1d 175
rJj
~ 150
C_z[
125
100
75
50
25
1%
0.1%
PERCENTAGE OF FUll SCALE. . .
0.05% 0.01%
The false junction is clamped with diodes to limit the voltage
excursion appearing at that point. This is necessary because the
amplifier will be overdriven and one-half its input voltage will
appear at the junction. Without the clamps, the scope used for
making the measurement would be overdriven and its recovery
time would mask the settling time of the amplifier.
The test circuit for measuring settling time to 0.01%, Figure 7,
is simply an extension of the same basic technique. Measuring
to the closer tolerance requires additional gain in the circuit
driving the oscilloscope.
+'S.
'000"
TO Sm.
S'NSI"VTTY
0' ." SCOPE
_II
Figure 5. Settling Time - Inverting Mode
SETTLING TIME MEASUREMENT
Although there are some exceptions, most members of industry
are in agreement on the description which says settling time is:
The interval of time from the application of an ideal step
function input until the closed-loop amplifier output has
entered and remains within a specified error band.
The well-informed user needs to be alert to the consequences of
settling time specs which do not meet that description.
This definition encompasses the major components which comprise
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...."
.."'1 _-'S.
-'s.
:r.,., _-'s.
-'S.
Figure 7. Settling Time Test Circuit for 0.01% Settling
IMPEDANCE MATCHING
The characteristics of the HOS-OSOoperational amplifier make
it an ideal choice for matching the impedances of video circuits
to the impedances of transmission lines.
In this application, source and load terminating resistors will
cause the output voltage to be halved at the end of the cable
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OPERATIONALAMPLIFIERS 2-249