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EVAL-ADM1184 Datasheet, PDF (5/8 Pages) Analog Devices – Evaluation Kit for ADM1184 ±0.8% Accurate Quad Voltage Monitor
EVALUATION BOARD OPERATION
ADM1184 SAMPLES
Two loose ADM1184 samples are included in the evaluation
kit. If the board does not have a device soldered in place, place
a single sample in the socket labeled U6 before powering on the
evaluation board.
POWERING THE EVALUATION BOARD
There are two methods of powering the EVAL-ADM1184:
connect a 9 V power supply through J3 or connect a bench
supply through J1. When using a 9 V power supply, be sure to
place S2 to the 9 V position; alternatively, when using a bench
supply, adjust S2 to the VCC position.
THEORY OF OPERATION
Four voltage rails are monitored by the ADM1184. Resistor
networks external to the VIN1, VIN2, VIN3, and VIN4 pins
set the trip points for the monitored rails, 3.3 V, 2.5 V, 1.8 V,
and 1.5 V.
Output OUT1 to Output OUT3 are solely dependent on their
associated input (that is, VIN1, VIN2, or VIN3). Before the
voltage on a VINx input reaches 0.6 V, the corresponding
output is switched to ground. When VINx detects 0.6 V, OUTx
is asserted after a 30 μs delay.
When all four monitored supplies exceed their programmed
thresholds a system power good signal (PWRGD) is asserted.
There is an internal 190 ms delay associated with the assertion
EVAL-ADM1184
of the PWRGD output. After PWRGD is asserted, if any of the
four monitored supplies drops below its programmed threshold,
the corresponding OUTx output and the PWRGD output are
deasserted. If the supply monitored by VIN4 drops below it’s
programmed threshold, the PWRGD output is only deasserted.
SIMULATING A POWER-UP SEQUENCE
Begin with all four rotary positions turned fully counter-
clockwise. Power on each of the four voltage rails by switching
the associated dedicated switch, S1 to S4, to the on position.
The rails may be powered on in any order. Yellow LEDs (D2,
D3, D4, and D5) provide a visual indication of the status of each
of the four voltage rails, while green LEDs (D6, D7, D8, and D9)
indicate when the OUT1 to OUT3 outputs and the system
PWRGD signal are asserted. The 190 ms delay associated with
the assertion of the power-good signal is easily observed.
OBSERVING FAULT CONDITIONS
Fault conditions may be investigated by using the four rotary
switches, VR1 to VR4. By turning a rotary switch clockwise, the
associated input voltage is reduced.
Each rotary switch (VR1 to VR4) controls the voltage at each
of the VIN1 to VIN4 inputs. As the rotary switch is turned
clockwise, the voltage monitored by VINx is reduced. When
the voltage at the VINx input pin drops below 0.6 V, OUTx is
switched to ground. The PWRGD output is also deasserted
immediately.
Figure 2. ADM1184 Evaluation Board Silkscreen
Rev. 0 | Page 5 of 8