EVAL-ADG5208FEBZ Datasheet, PDF (5/12 Pages) Analog Devices – On-board low dropout

EVAL-ADG5208FEBZ User Guide
UG-874
JUMPER SETTINGS
SWITCHES AND 0 Ω RESISTORS
Switches are used to control the ADG5208F manually and
0 Ω resistors are used to configure the digital control voltage.
Table 2 shows a summary of the switches and 0 Ω resistors and
how they are used on the evaluation board.
Use Switch SW2 to Switch SW4 to control the switches of the
ADG5208F. Position L is tied to GND and sets the logic low,
and Position H is tied to VL and sets the logic high.
Use SW1 to enable or disable the device. Position DIS is tied to
GND and disables the device, and Position EN is tied to VL and
enables the device.
Resistor R15 connects the on-board LDO regulator to the VDD
supply. Remove this resistor to protect the LDO regulator from
voltages higher than 28 V. Change the 0 Ω resistor to Position
R13 to use an alternative digital voltage connected to DC_V1.
Table 1. ADG5208F Truth Table
SW4 (A2) SW3 (A1) SW2 (A0)
X¹
X¹
X¹
L
L
L
L
L
H
L
H
L
L
H
H
H
L
L
H
L
H
H
H
L
H
H
H
SW1 (EN)
DIS
EN
EN
EN
EN
EN
EN
EN
EN
Connected Sx
All switches off
S1
S2
S3
S4
S5
S6
S7
S8
1 _{X means don’t care.}
SMB CONNECTORS
The parallel interface of the ADG5208F is controlled manually
using the link headers of Switch SW1 to Switch SW4, or it can be
accessed using the SMB connectors, EN, A0, A1, and A2. To use
the SMB connectors, remove the 0 Ω R31, R33, R35, and R37
resistors.
Table 2. Switch and 0 Ω Resistor Descriptions
Label
Position
SW1
EN
DIS
SW2
L
H
SW3
L
H
SW4
L
H
R13, R14
R14
R13
R15
Inserted
Removed
R31, R33, R35, R37
Inserted
Removed
Description
Logic 0 on the EN pin
Logic 1 on the EN pin
Logic 0 on the A0 pin
Logic 1 on the A0 pin
Logic 0 on the A1 pin
Logic 1 on the A1 pin
Logic 0 on the A2 pin
Logic 1 on the A2 pin
On-board LDO regulator digital voltage
EXT_VL digital voltage
LDO regulator powered up
LDO regulator unpowered
SW1 to SW4 control digital logic
SMB connectors control digital logic
Rev. B | Page 5 of 12