AD824_03 Datasheet, PDF (5/16 Pages) Analog Devices – Single Supply, Rail-to-Rail Low Power, FET-Input Op Amp

AD824
WAFER TEST LIMITS (@ V_S = 5.0 V, V_CM = 0 V, T_A = 25؇C unless otherwise noted)
Parameter
Symbol
Conditions
Limit
Unit
Offset Voltage
Input Bias Current
Input Offset Current
Input Voltage Range
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Large Signal Voltage Gain
Output Voltage High
Output Voltage Low
Supply Current/Amplifier
V_OS
I_B
I_OS
V_CM
CMRR
PSRR
A_VO
V_OH
V_OL
I_SY
V_CM = 0 V to 2 V
V = + 2.7 V to +12 V
R_L = 2 kW
I_SOURCE = 20 mA
I_SINK = 20 mA
V_O = 0 V, R_L = •
1.0
12
20
–0.2 to 3.0
66
70
15
4.975
25
600
mV max
pA max
pA
V min
dB min
mV/V
V/mV min
V min
mV max
mA max
NOTE
Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for
standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.
ABSOLUTE MAXIMUM RATINGS¹
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . –V_S – 0.2 V to +V_S
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . ± 30 V
Output Short Circuit Duration to GND . . . . . . . . . Indefinite
Storage Temperature Range
R-14, R-16 Packages . . . . . . . . . . . . . . . . –65∞C to +150∞C
Operating Temperature Range
AD824A . . . . . . . . . . . . . . . . . . . . . . . . . . . –40∞C to +85∞C
Junction Temperature Range
R-14, R-16 Packages . . . . . . . . . . . . . . . . –65∞C to +150∞C
Lead Temperature Range (Soldering 60 sec) . . . . . . . . . 300∞C
Package Type
q_JA2
q_JC
Unit
14-Lead SOIC (R)
16-Lead SOIC (R)
120
36
∞C/W
92
27
∞C/W
NOTES
1 _{Absolute maximum ratings apply to packaged parts unless otherwise noted.}
2 _{qJA is specified for the worst case conditions, i.e., qJA is specified for device in socket}
for P-DIP packages; q_JA is specified for device soldered in circuit board for SOIC
package.
Model
ORDERING GUIDE
Temperature Package
Range
Description
Package
Option
AD824AR-14
–40∞C to +85∞C 14-Pin SOIC
AD824AR-14-3V –40∞C to +85∞C 14-Pin SOIC
AD824AR-16
–40∞C to +85∞C 16-Pin SOIC
R-14
R-14
R-16
V_CC
R1
R2
I5
I6
Q18 Q29
R9
J1
+IN
Q4
Q5
J2
R13
R15
–IN
Q6
C3
Q7
C2
Q21 Q27
Q19
Q20
R7
Q22
Q23
C4
V_OUT
Q8
Q2
Q3
Q24 Q25
C1
Q31
R12
R14
I1
I2
I3
I4
R17 ^Q28
Q26
V_EE
Figure 1. Simplified Schematic of 1/4 AD824
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD824 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. C
–5–