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AD7762_15 Datasheet, PDF (5/29 Pages) Analog Devices – 625 kSPS, 24-Bit, 109 dB Sigma-Delta ADC With On-Chip Buffer
AD7762
Data Sheet
Parameter
REFERENCE INPUT/OUTPUT
VREF Input Voltage
VREF Input DC Leakage Current
VREF Input Capacitance
POWER DISSIPATION
Total Power Dissipation
Standby Mode
POWER REQUIREMENTS
AVDD1 (Modulator Supply)
AVDD2 (General Supply)
AVDD3 (Diff Amp Supply)
AVDD4 (Ref Buffer Supply)
DVDD
VDRIVE
Normal Mode
AIDD1 (Modulator)
AIDD2 (General)
AIDD4 (Reference Buffer)
Low Power Mode
AIDD1 (Modulator)
AIDD2 (General)
AIDD4 (Reference Buffer)
Test Conditions/Comments
VDD3 = 3.3 V ± 5%
VDD3 = 5 V ± 5%
Normal mode
Low power mode
Clock stopped
±5%
±5%
±5%
AVDD4 = 5 V
AVDD4 = 5 V
Specification Unit
+2.5
+4.096
±6
5
V max
V max
µA max
pF max
958
mW max
661
mW max
6.35
mW max
+2.5
+5
+3.15/+5.25
+3.15/+5.25
+2.5
+1.65/+2.7
V
V
V min/max
V min/max
V
V min/max
49/51
40/42
34/36
mA typ/max
mA typ/max
mA typ/max
26/28
20/23
9/10
mA typ/max
mA typ/max
mA typ/max
AIDD3 (Diff Amp)
DIDD
DIGITAL I/O
MCLK Input Amplitude3
Input Capacitance
Input Leakage Current
Three-State Leakage Current (D15:D0)
VINH
VINL
VOH 4
VOL4
AVDD3 = 5 V, both modes
Both modes
41/44
63/70
5
7.3
±5
±5
0.7 × VDRIVE
0.3 × VDRIVE
1.5
0.1
mA typ/max
mA typ/max
V typ
pF typ
μA max
μA max
V min
V max
V min
V max
1 See the Terminology section.
2 SNR specifications in dBs are referred to a full-scale input, FS. Tested with an input signal at 0.5 dB below full scale, unless otherwise specified.
3 While the AD7762 can function with an MCLK amplitude of less than 5 V, this is the recommended amplitude to achieve the performance as stated.
4 Tested with a 400 µA load current.
Rev. A | Page 4 of 28