AD7142_15 Datasheet, PDF (5/73 Pages) Analog Devices – Programmable Controller for Capacitance Touch Sensors

AD7142
SPECIFICATIONS
AVCC, DVCC = 2.6 V to 3.6 V, TA = −40^oC to +85°C, unless otherwise noted.
Table 1.
Parameter
CAPACITANCE-TO-DIGITAL CONVERTER
Update Rate
Resolution
CIN Input Range¹
No Missing Codes
CIN Input Leakage
Total Unadjusted Error
Output Noise (Peak-to-Peak)
Min
35.45
16
Output Noise (RMS)
Parasitic Capacitance
CBULK Offset Range¹
CBULK Offset Resolution
Low Power Mode Delay Accuracy
EXCITATION SOURCE
Frequency
Output Voltage
Short-Circuit Source Current
Short-Circuit Sink Current
Maximum Output Load
CSHIELD Output Drive
CSHIELD Bias Level
LOGIC INPUTS (SDI, SCLK, CS, SDA, GPI TEST)
VIH Input High Voltage
VIL Input Low Voltage
IIH Input High Voltage
IIL Input Low Voltage
Hysteresis
OPEN-DRAIN OUTPUTS (SCLK, SDA, INT)
VOL Output Low Voltage
IOH Output High Leakage Current
LOGIC OUTPUTS (SDO, GPO)
VOL Output Low Voltage
VOH Output High Voltage
SDO Floating State Leakage Current
GPO Floating State Leakage Current
POWER
AVCC, DVCC
VDRIVE
ICC
240
0.7 × VDRIVE
−1
VDRIVE − 0.6
−5
2.6
1.65
Typ
36.86
16
±2
25
7
3
0.8
0.5
±20
156.25
250
20
50
250
10
AVCC/2
150
0.1
3.3
0.9
16
2.25
Max Unit Test Conditions/Comments
38.4 ms 12 conversion stages in sequencer, decimation rate = 256
Bit
pF
Bit
Guaranteed by design, but not production tested
nA
±20 %
Codes Decimation rate = 128
Codes Decimation rate = 256
Codes Decimation rate = 128
Codes Decimation rate = 256
40 pF
Parasitic capacitance to ground, per CIN input
guaranteed by characterization
pF
fF
4
%
% of 200 ms, 400 ms, 600 ms, or 800 ms
260 kHz
AVCC V
mA
mA
pF
μA
V
Capacitance load on source to ground
V
0.4 V
μA
1
μA
mV
VIN = VDRIVE
VIN = DGND
0.4 V
±1 μA
ISINK = −1 mA
VOUT = VDRIVE
0.4 V
V
±1 μA
2
μA
3.6 V
3.6 V
1
mA
20 μA
33 μA
4.5 μA
18 μA
ISINK = 1 mA, VDRIVE = 1.65 V to 3.6 V
ISOURCE = 1 mA, VDRIVE = 1.65 V to 3.6 V
Pin three-state, leakage measured to GND and DVCC
Pin three-state, leakage measured to GND and DVCC
Serial interface operating voltage
In full power mode
Low power mode, converter idle, TA = 25°C
Low power mode, converter idle
Full shutdown, TA = 25°C
Full shutdown
1 _{CIN and CBULK are defined in Figure 2.}
Rev. A | Page 4 of 72