ADSP-21XX4444 Datasheet, PDF (48/64 Pages) Analog Devices – ADSP-2100 Family DSP Microcomputers

ADSP-21xx
TIMING PARAMETERS (ADSP-2103/2162/2164)
MEMORY READ
Parameter
Timing Requirement:
t_RDD RD Low to Data Valid
t_AA
A0–A13, PMS, DMS, BMS to Data Valid
t_RDH Data Hold from RD High
Switching Characteristic:
t_RP
RD Pulse Width
t_CRD CLKOUT High to RD Low
t_ASR A0–A13, PMS, DMS, BMS Setup before RD Low
t_RDA A0–A13, PMS, DMS, BMS Hold after RD Deasserted
t_RWR RD High to RD or WR Low
w = wait states × t_CK.
10.24 MHz
Min Max
33.8
49.2
0
43.8
19.4 34.4
12.4
14.4
38.8
Frequency
Dependency
Min
Max
Unit
0.5t_CK – 15 + w ns
0.75t_CK – 24 + w ns
ns
0.5t_CK – 5 + w
ns
0.25t_CK – 5 0.25t_CK + 10
ns
0.25t_CK – 12
ns
0.25t_CK – 10
ns
0.5t_CK – 10
ns
CLKOUT
A0 – A13
DMS, PMS
BMS
RD
D
WR
t_ASR
t_RP
t_CRD
t_RDD
t_AA
t_RDA
t_RWR
t_RDH
Figure 42. Memory Read
–48–
REV. B