AD9898 Datasheet, PDF (48/52 Pages) Analog Devices – CCD Signal Processor with Precision Timing™ Generator

AD9898
VDD
(INPUT)
CLI
(INPUT)
OUTCONT
(INTERNAL)
SERIAL
WRITES
VD
(OUTPUT)
HD
(OUTPUT)
DIGITAL
OUTPUTS
ODD FIELD
4
EVEN FIELD
ODD FIELD
H1, V1, V2, V3, V4, VSG1, VSG2, VSUB, FD, SUBCK
,
H2, RG, MSHUT, STROBE
DCLK1
DCLK2*
AFESTBY
(REGISTER)
DIGSTBY
(REGISTER)
*DCLK2 WILL BE OUTPUT ON FD/DLCK2, PIN 16, PROVIDING REGISTER DCLK2SEL (ADDR 0xD5) = 1.
Figure 53. Recommended Power-Down Sequence
POWER-DOWN MODE OPERATION
Recommended Power-Down Sequence
When the AD9898 is going to be powered down, the following
sequence is recommended. (Refer to Figure 53 for each step.)
1. Program OUTCONT_REG (Addr 0x05) = 0.
2. Program registers AFESTBY (Addr 0x05) = 0 and DIGSTBY
(Addr 0x05) = 0.
3. Remove power from the AD9898.
–48–
REV. 0