ADE7169_15 Datasheet, PDF (46/152 Pages) Analog Devices – Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver

ADE7116/ADE7156/ADE7166/ADE7169/ADE7566/ADE7569
Bit
Mnemonic
[3:2] VARNOLOAD¹
[1:0] APNOLOAD
Default
00
00
Description
Reactive power no load threshold.
VARNOLOAD
Result
00
No load detection disabled
01
No load detection enabled with threshold = 0.015% of full scale
10
No load detection enabled with threshold = 0.0075% of full scale
11
No load detection enabled with threshold = 0.0037% of full scale
Active power no load threshold.
APNOLOAD
Result
00
No load detection disabled
01
No load detection enabled with threshold = 0.015% of full scale
10
No load detection enabled with threshold = 0.0075% of full scale
11
No load detection enabled with threshold = 0.0037% of full scale
1 _{This function is not available in the ADE7116, ADE7156, ADE7166, or ADE7566.}
Table 37. Accumulation Mode Register (ACCMODE, Address 0x0F)
Bit
Mnemonic
Default Description
7
ICHANNEL¹
0
6
FAULTSIGN¹
0
This bit indicates the current channel used to measure energy in antitampering mode.
0 = Channel A (IPA)
1 = Channel B (IPB)
Configuration bit to select the event that triggers a fault interrupt.
0 = FAULT interrupt occurs when part enters fault mode
1 = FAULT interrupt occurs when part enters normal mode
5
VARSIGN²
0
Configuration bit to select the event that triggers a reactive power sign interrupt. If cleared to 0,
a VARSIGN interrupt occurs when reactive power changes from positive to negative. If set to 1, a
VARSIGN interrupt occurs when reactive power changes from negative to positive.
4
APSIGN
0
Configuration bit to select event that triggers an active power sign interrupt. If cleared to 0, an
APSIGN interrupt occurs when active power changes from positive to negative. If set to 1, an
APSIGN interrupt occurs when active power changes from negative to positive.
3
ABSVARM²
0
Logic 1 enables absolute value accumulation of reactive power in energy register and pulse
output.
2
SAVARM²
0
Logic 1 enables reactive power accumulation depending on the sign of the active power. If
active power is positive, var is accumulated as it is. If active power is negative, the sign of the var
is reversed for the accumulation. This accumulation mode affects both the var registers (VARHR,
RVARHR, LVARHR) and the pulse output when connected to var.²
1
POAM
0
Logic 1 enables positive-only accumulation of active power in energy register and pulse output.
0
ABSAM
0
Logic 1 enables absolute value accumulation of active power in energy register and pulse
output.
1 _{This function is not available in the ADE7566 or ADE7569.}
2 _{This function is not available in the ADE7116, ADE7156, ADE7166, or ADE7566.}
Table 38. Gain Register (GAIN, Address 0x1B)
Bit
Mnemonic
Default
Description
[7:5] PGA2
000
These bits define the voltage channel input gain.
PGA2
Result
000
Gain = 1
001
Gain = 2
010
Gain = 4
011
Gain = 8
100
Gain = 16
4
Reserved
0
Reserved.
Rev. B | Page 46 of 152