ADSP-2105KP-40 Datasheet, PDF (45/64 Pages) Analog Devices – ADSP-2100 Family DSP Microcomputers

ADSP-21xx
TIMING PARAMETERS (ADSP-2103/2162/2164)
CLOCK SIGNALS & RESET
Parameter
10.24 MHz
Min Max
Frequency
Dependency
Min
Max
Unit
Timing Requirement:
t_CK
CLKIN Period
97.6 150
ns
t_CKL CLKIN Width Low
20
ns
t_CKH CLKIN Width High
20
ns
t_RSP RESET Width Low
488
5t_CK1
ns
Switching Characteristic:
t_CPL CLKOUT Width Low
38.8
0.5t_CK – 10
ns
t_CPH CLKOUT Width High
38.8
0.5t_CK – 10
ns
t_CKOH CLKIN High to CLKOUT High
0
20
ns
NOTES
1_{Applies after powerup sequence is complete. Internal phase lock loop requires no more than 2000 CLKIN cycles assuming stable CLKIN (not including crystal}
oscillator startup time).
CLKIN
CLKOUT
t_CK
t_CKH
t_CKL
t_CKOH
t_CPH
t_CPL
Figure 39. Clock Signals
REV. B
–45–