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| ADUC7122_14 Datasheet, PDF (43/96 Pages) Analog Devices – Precision Analog Microcontroller, 12-Bit Analog I/O, ARM7TDMI MCU | |||
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Data Sheet
OTHER ANALOG PERIPHERALS
9B
DAC
52B
The ADuC7122 incorporates 12 buffered, 12-bit voltage output
string DACs on chip. Each DAC has a rail-to-rail voltage output
buffer capable of driving 5 kâ¦/100 pF.
Each DAC has two selectable ranges: 0 V to VREF (internal band
gap 2.5 V reference) and 0 V to AVDD. The maximum signal
range is 0 V to AVDD.
ADuC7122
MMRs Interface
1B
Each DAC is independently configurable through a control
register and a data register. These two registers are identical
for the 12 DACs. DACxCON and DACxDAT (see Table 64 to
Table 67) are described in detail in this section.
AVDD
VREF
DAC_REBUF
AVDD
SW_A0
VREF
DAC_REBUF
SW_A12
STRING
DAC
SW_B0
SW_D0
SW_C0
DAC_BUF
DAC0
STRING
DAC
SW_B11
SW_D11
SW_C11
DAC_BUF
DAC11
HCLK
TIMER1
Figure 27. DAC Configuration
12
DATA_REG
STRING
DAC
SW_C
SW_B
DAC_BUF
DACx
Table 64. DACxCON Registers
Name
Address
DAC0CON
0xFFFF0580
DAC1CON
0xFFFF0588
DAC2CON
0xFFFF0590
DAC3CON
0xFFFF0598
DAC4CON
0xFFFF05A0
DAC5CON
0xFFFF05A8
DAC6CON
0xFFFF05B0
DAC7CON
0xFFFF05B8
DAC8CON
0xFFFF05C0
DAC9CON
0xFFFF05C8
DAC10CON
0xFFFF05D0
DAC11CON
0xFFFF05D8
Figure 28. DAC User Functionality
Default Value
0x100
0x100
0x100
0x100
0x100
0x100
0x100
0x100
0x100
0x100
0x100
0x100
Rev. A | Page 43 of 96
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
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