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ADAV801_15 Datasheet, PDF (43/60 Pages) Analog Devices – Audio Codec for Recordable DVD
ADAV801
Mute and De-Emphasis—Address 0011110 (0x1E)
Table 73. Mute and De-Emphasis Register Bit Map
7
6
5
4
Reserved
Reserved
TxMUTE
Reserved
3
Reserved
2
SRC_DEEM1
1
SRC_DEEM0
Table 74. Mute and De-Emphasis Register Bit Descriptions
Bit Name
Description
TxMUTE
Mutes the AES3/S/PDIF transmitter.
0 = Transmitter is not muted.
1 = Transmitter is muted.
SRC_DEEM[1:0]
Selects the de-emphasis filter for the input data to the sample rate converter.
00 = No de-emphasis.
01 = 32 kHz de-emphasis.
10 = 44.1 kHz de-emphasis.
11 = 48 kHz de-emphasis.
0
Reserved
NonAudio Preamble Type—Address 0011111 (0x1F)
Table 75. NonAudio Preamble Type Register (Read-Only) Bit Map
7
6
5
4
3
Reserved
Reserved
Reserved
Reserved
DTS-CD
Preamble
2
NonAudio
Frame
1
NonAudio
Subframe_A
0
NonAudio
Subframe_B
Table 76. NonAudio Preamble Type Register (Read-Only) Bit Descriptions
Bit Name
Description
DTS-CD Preamble
This bit is set if the DTS-CD preamble is detected.
NonAudio Frame
This bit is set if the data received through the AES3/S/PDIF receiver is nonaudio data according to the IEC61937
standard or nonaudio data according to SMPTE337M.
NonAudio Subframe_A This bit is set if the data received through Channel A of the AES3/S/PDIF receiver is subframe nonaudio data
according to SMPTE337M.
NonAudio Subframe_B This bit is set if the data received through Channel B of the AES3/S/PDIF receiver is subframe nonaudio data
according to SMPTE337M.
Receiver Channel Status Buffer—Address 0100000 to Address 0110111 (0x20 to 0x37)
Table 77. Receiver Channel Status Buffer Register Bit Map
7
6
5
4
RCSB7
RCSB6
RCSB5
RCSB4
3
RCSB3
2
RCSB2
1
RCSB1
0
RCSB0
Table 78. Receiver Channel Status Buffer Register Bit Descriptions
Bit Name
Description
RCSB[7:0]
The 24-byte receiver channel status buffer. The PRO bit is stored at address location 0x20, Bit 0. This buffer is read-
only if the channel status is not autobuffered between the receiver and transmitter.
Transmitter Channel Status Buffer—Address 0111000 to Address 1001111 (0x38 to 0x4F)
Table 79. Transmitter Channel Status Buffer Register Bit Map
7
6
5
4
TCSB7
TCSB6
TCSB5
TCSB4
3
TCSB3
2
TCSB2
1
TCSB1
0
TCSB0
Table 80. Transmitter Channel Status Buffer Register Bit Descriptions
Bit Name
Description
TCSB[7:0]
The 24-byte transmitter channel status buffer. The PRO bit is stored at address location 0x38, Bit 0. This buffer is
disabled when autobuffering between the receiver and transmitter is enabled.
Rev. A | Page 43 of 60