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ADXL180 Datasheet, PDF (42/56 Pages) Analog Devices – Configurable, High g, iMEMS Accelerometer
ADXL180
SELF-TEST ERROR
In the ADXL180, self-test is automatically run during Phase 3.
If the internal self-test mode is selected, then the device enters
into the self-test routine as detailed in Figure 27 and Figure 28.
The device reports a failure during Phase 3 if it does not detect
two successful self-test pulses. When external self-test is
enabled, the device enters into the self- test routine as detailed
in Figure 27 and Figure 28; however, it reports all six self-test
pulses to the control module. The control module is responsible
for designation of a device failure.
OFFSET ERROR/OFFSET DRIFT MONITORING
During Phase 3, an offset calculation is performed by averaging
the offset value with self-test deasserted (see Figure 27 for more
details). If this value is outside of the datasheet specifications,
then an error is reported at the start of Phase 5. Additionally,
VOV
VDD
(NOMINAL)
VPUR
VHYST
VHYST
the ADXL180 continuously monitors long term offset drift. If
the long-term offset correction exceeds the maximum specified
value, then an offset error is reported. This error is reported
independent of whether or not the auto-zero functionality has
been enabled.
VOLTAGE REGULATOR MONITOR RESET
OPERATION
The control module can reset the ADXL180 by lowering the bus
supply voltage to cause a power-fail reset. Figure 31 shows that,
for both the undervoltage and overvoltage trip thresholds, there
is a nominal 120 mV hysteresis before the voltage regulator
returns to within specification. No data transmission occurs
while the ADXL180 is in the reset state. The bus current is held
at the idle level during reset.
POWER OK
RESET
TIME
Figure 31. Voltage Regulator Monitor Reset Functionality
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