AD14060L_15 Datasheet, PDF (42/48 Pages) Analog Devices – DSP Multiprocessor Family

AD14060/AD14060L
SHARC_A
SHARC_B
SHARC_C
SHARC_D
TDI TDI
TDO TDI
OTHER JTAG
CONTROLLER
EMULATOR
JTAG
CONNECTOR
TCK
TMS
EMU
TRST
TDO
CLKIN
OPTIONAL
TDO TDI
TDO TDI
TDO
JTAG DEVICE
(OPTIONAL)
TDI
TDO
ADSP-2106x
#n
TDI
TDO
Figure 27. JTAG Scan Path Connections for the AD14060/AD14060L
TDI TDO TDI TDO TDI TDO
1
5kΩ
TDI TDO TDI TDO TDI TDO
TDI
EMU
TCK
TMS
TRST
TDO
CLKIN
1
5kΩ
1_{OPEN-DRAIN DRIVER OR EQUIVALENT, THAT IS:}
EMU
SYSTEM
CLKIN
Figure 28. JTAG Clock Tree for Multiple ADSP-2106x Systems
OUTPUT DRIVE CURRENTS
POWER DISSIPATION
Figure 29 shows typical I-V characteristics for the output
drivers of the ADSP-2106x. The curves represent the current
drive capability of the output drivers as a function of output
voltage.
120
100
80
HIGH LEVEL DRIVE
(P DEVICE)
60
40
20
0
–20
–40
–60
–80
–100
–120
LOW LEVEL DRIVE
(N DEVICE)
–140
–160
0
1
2
3
4
5
SOURCE VOLTAGE (V)
Figure 29. ADSP-2106x Typical Drive Currents (VDD = 5 V)
Total power dissipation has two components, one due to
internal circuitry and one due to the switching of external
output drivers. Internal power dissipation is dependent on the
instruction execution sequence and the data operands involved.
Internal power dissipation is calculated as follows:
PINT = IDDIN × VDD
The external component of total power dissipation is caused by
the switching of output pins. Its magnitude depends on the
following:
• Number of output pins that switch during each cycle (O)
• Maximum frequency at which they can switch (f)
• Load capacitance (C)
• Voltage swing (VDD)
and is calculated by
PEXT = O × C × VDD² × f
Rev. B | Page 42 of 48