ADAU1401A Datasheet, PDF (41/52 Pages) Analog Devices – SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs

ADAU1401A
ADDRESS 2080 AND ADDRESS 2081 (0x0820 AND
0x0821)—MULTIPURPOSE PIN CONFIGURATION
REGISTERS
Each multipurpose pin can be set to different functions from
these registers (Address 2080 and Address 2081). The two 3-byte
registers are broken up into 12 4-bit (nibble) sections that each
control a different MP pin. Table 54 lists the function of each
nibble setting within the MPx pin configuration registers. The
MSB of each pin’s 4-bit configuration inverts the input to or output
from the pin. The internal pull-up resistor (approximately 15 kΩ)
of each MPx pin is enabled when it is set as a digital input (either a
GPIO input or a serial data port input).
Table 52. Register 2080 Bit Map
D15 D14 D13 D12 D11
MP33 MP32 MP31 MP30 MP23
D10
MP22
D9
MP21
D8
MP20
D23
D7
MP53
MP13
D22
D6
MP52
MP12
D21
D5
MP51
MP11
D20
D4
MP50
MP10
D19
D3
MP43
MP03
D18
D2
MP42
MP02
D17
D1
MP41
MP01
D16
D0
MP40
MP00
Default
0x00
0x0000
Table 53. Register 2081 Bit Map
D15 D14 D13 D12 D11
MP93 MP92 MP91 MP90 MP83
D10
MP82
D9
MP81
D8
MP80
D23
D7
MP113
MP73
D22
D6
MP112
MP72
D21
D5
MP111
MP71
D20
D4
MP110
MP70
D19
D3
MP103
MP63
D18
D2
MP102
MP62
D17
D1
MP101
MP61
D16
D0
MP100
MP60
Default
0x00
0x0000
Table 54. Multipurpose Pin Configuration Registers Bit Descriptions
Bit Name
Description
MPx[3:0]
Set the function of each multipurpose pin.
Settings
Function
1111
Auxiliary ADC input (see Table 63)
1110
Reserved
1101
Reserved
1100
Serial data port—inverted (see Table 65)
1011
Open-collector output—inverted
1010
GPIO output—inverted
1001
GPIO input, no debounce—inverted
1000
GPIO input, debounce—inverted
0111
N/A
0110
Reserved
0101
Reserved
0100
Serial data port (see Table 65)
0011
Open-collector output
0010
GPIO output
0001
GPIO input, no debounce
0000
GPIO input, debounce
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