ADSP-BF527_15 Datasheet, PDF (40/88 Pages) Analog Devices – Blackfin Embedded Processor

ADSP-BF522/ADSP-BF523/ADSP-BF524/ADSP-BF525/ADSP-BF526/ADSP-BF527
Table 33. Power-Up Reset Timing
Parameter
Min
Timing Requirement
t_{RST_IN_PWR} RESET Deasserted after the V_DDINT, V_DDEXT, V_DDRTC, V_DDUSB, V_DDMEM, V_DDOTP, and CLKIN 3500 × t_CKIN
Pins are Stable and Within Specification
RESET
t_{RST_IN_PWR}
Max
Unit
ns
CLKIN
V_{DD_SUPPLIES}
In Figure 10, V_{DD_SUPPLIES} is V_DDINT, V_DDEXT, V_DDRTC, V_DDUSB, V_DDMEM, and V_DDOTP.
Figure 10. Power-Up Reset Timing
Rev. D | Page 40 of 88 | July 2013