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OP177 Datasheet, PDF (4/12 Pages) Analog Devices – Ultraprecision Operational Amplifier
OP177–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (@ VS = ؎15 V, –40°C ≤ TA ≤ +85؇C, unless otherwise noted)
Parameter
Symbol Conditions
OP177E
OP177F
OP177G
Min Typ Max Min Typ Max Min Typ Max
Input Offset Voltage
Average Input Offset
Voltage Drift
Input Offset Current
Average Input Offset
Current Drift
Input Bias Current
Average Input Bias
Current Drift
Input Voltage Range
Common-Mode
Rejection Ratio
Power Supply Rejection
Ratio
Large-Signal
Voltage Gain
Output Voltage Swing
Power Consumption
Supply Current
VOS
TCVOS
IOS
TCIOS
IB
TCIB
IVR
CMRR
PSRR
AVO
VO
PD
ISY
10
20
(Note 1)
0.03 0.1
0.5 1.5
(Note 2)
1.5 25
–0.2 2.4 4
(Note 2)
(Note 3)
8
25
± 13 ± 13.5
VCM = ± 13 V
120
VS = ± 3 V to ± 18 V
120
RL ≥ 2 kΩ, VO = ± 10 V4
RL ≥ 2 kΩ
VS = ± 15 V, No Load
VS = ± 15 V, No Load
2000
± 12
140
125
6000
± 13.0
60
75
2.0 2.5
15
40
0.1 0.3
0.5 2.2
1.5 40
–0.2 2.4 4
8
40
± 13 ± 13.5
120 140
110 120
2000
± 12
6000
± 13.0
60
75
2.0 2.5
20
100
0.7 1.2
0.5 4.5
1.5 85
2.4
± 6.0
15
60
± 13.0 ± 13.5
110 140
106 115
1000 4000
± 12.0 ± 13.0
60
75
2.0 2.5
NOTES
1OP177E: TCVOS is 100% tested.
2Guaranteed by endpoint limits.
3Guaranteed by CMRR test condition.
4To insure high open-loop gain throughout the ± 10 V output range, AVO is tested at –10 V ≤ VO ≤ 0 V, 0 V ≤ VO ≤ +10 V, and –10 V ≤ VO ≤ +10 V.
Specifications subject to change without notice.
Units
µV
µV/°C
nA
pA/°C
nA
pA/°C
V
dB
dB
V/mV
V
mW
mA
Figure 2. Typical Offset Voltage Test Circuit
Figure 3. Optional Offset Nulling Circuit
–4–
REV. B