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HDL-3806_15 Datasheet, PDF (4/6 Pages) Analog Devices – HYBRID VIDEO DIGITAL TO ANALOG CONVERTERS
Theoryof Operation
Refer to the block diagram of the HDL-380S/3806 D/A
Converter.
As shown, the unit is comprised of three each random access
memories (RAMs) and AD9700 current output D/A converters.
These components operate as three pairs in controlling the red,
green, and blue (RGB) analog outputs of the device; and gready
simplify the interface between the frame buffers and the monitor
in raster scan graphics systems.
RGB digital data information can be loaded into the RAMs
during retrace periods. During horizontal retrace intervals,
small blocks of data can be entered; the complete color map can
be rewritten during the longer vertical retrace times.
Intensities for the RGB outputs are updated by a single 8-bit
address word and a Strobe signal during the RAM read
operations.
The routing of the digital data to the correct RAM and its associated
D/A is controlled by the digital Address input Signals; and by
the Red Chip Select, Green Chip Select, Blue Chip Select, and
Write Enable signals.
In addition to digital input and address information, the user of
the HDI-380S/3806 also has control over composite functions
with Red Sync, Green Sync, Blue Sync, Composite Blanking,
Reference White, and 10% Bright.
8
I
.1
8
I
256
x
8
RAM I
AD9700
D/A
CONVERTER
41) RED RETURN
OB JI If Ix
S R:M
OL8
E 256
T x
E 8
ADO700
D/A
CONVERTER
f-+-{35)
GREEN RETURN
AD9700
D/A
RAM
CONVERTER
*BUFFER REPLACED
WITH D-TYPE
REGISTERS
CLOCKED BY PIN 22
STROBE IN
HDG-3806.
HLD-3805/3806 Block Diagram
-4-
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