EVAL-AD7891-2CB Datasheet, PDF (4/12 Pages) Analog Devices – Evaluation Board for Single Supply, 12-Bit 500 kSPS ADC

EVAL-AD7891-2CB
Table II. 96-Way Connector Pin Functions.
ROW
B
B
A
B
C
B
B
B
A
B
B
C
B
A
B
C
B
B
B
A
B
C
A
B
C
A
B
C
A
A
A
A
A
A
B
C
A
B
C
A
B
C
PIN NO.
2
3
4
4
4
5
6
7
9
9
10
10
11
12
12
12
13
14
15
16
16
16
17
17
17
20
20
20
22
23
24
25
26
29
29
29
31
31
31
32
32
32
MNEMONIC
D0
D1
DGND
DGND
DGND
D2
D3
D4
RD
D5
D6
CS
D7
DGND
DGND
DGND
D8
D9
D10
DGND
DGND
DGND
FL0
D11
IRQ2
DGND
DGND
DGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AGND
AV_SS
AV_SS
AV_SS
AV_DD
AV_DD
AV_DD
Note : The remainder of the pins on the 96-way connector are no connects.
12 3 4 5
678 9
Figure 2. Pin Configuration for D-Type Connector, J2
Table III. J2 Pin Functions
PIN NO.
1
2
3
4
5
6
7
8
9
MNEMONIC
SCLK
EOC
RFS
TFS
DATA IN
DGND
DATA OUT
V_DD
STANDBY
9-Way D-Type Connector Pin Description
SCLK Serial Clock Input. When the device is in its serial
mode, an external serial clock is applied through this
input to obtain serial data from the part.
EOC
End-of-Conversion. This output indicates the status of
conversion. A low going pulse on this line signifies the
end of a conversion.
RFS Receive Frame Synchronisation. When the device is in
its serial mode, an external RFS signal is applied to this
input to obtain serial data from the part.
TFS Transmit Frame Synchronisation. When the part is in
serial mode, an external TFS signal is applied to this
input when serial data is being written to the part
DATA IN
Serial Data Input. Serial data to the part is
applied this input. The serial data should be valid on
the falling edge of SCLK for six edges after TFS goes
low.
DGND Digital Ground. This line is connected to the digital
ground plane on the evaluation board. It allows the
user to provide the digital supply via the connector
along with the other digital signals.
DATA OUT Serial Data Output. Serial data from the part
is obtained at this output. The serial data is clocked
out by the rising edge of SCLK and is valid on the
falling edge of SCLK for sixteen edges after RFS goes
low.
V_DD
+5 V Supply. This line is connected to the V_DD supply
line on the evaluation board. It allows the user to
provide the digital supply via the connector along with
the other digital signals.
STANDBY
Standby Input. When this input is at a logic
zero, the AD7891-2 is put into standby mode. Normal
operation of the part takes place when STANDBY is
high.
–4–
REV. A