AD9925_15 Datasheet, PDF (4/96 Pages) Analog Devices – CCD Signal Processor with Vertical Driver and Precision Timing Generator

AD9925
DIGITAL SPECIFICATIONS
RGVDD = HVDD = DVDD = DRVDD = 2.7 V to 3.6 V, CL = 20 pF, TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter
LOGIC INPUTS
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Capacitance
LOGIC OUTPUTS (Powered by DVDD, DRVDD)
High Level Output Voltage at IOH = 2 mA
Low Level Output Voltage at IOL = 2 mA
RG and H-DRIVER OUTPUTS (Powered by HVDD, RGVDD)
High Level Output Voltage at Maximum Current
Low Level Output Voltage at Maximum Current
Maximum Output Current (Programmable)
Maximum Load Capacitance (for Each Output)
Symbol
VIH
VIL
IIH
IIL
CIN
VOH
VOL
Min
Typ
2.1
10
10
10
VDD – 0.5
VDD – 0.5
30
100
Max
Unit
V
0.6
V
µA
µA
pF
V
0.5
V
V
0.5
V
mA
pF
Rev. A | Page 4 of 96