AD9235_15 Datasheet, PDF (4/40 Pages) Analog Devices – 12-Bit, 20/40/65 MSPS 3 V A/D Converter

AD9235
Data Sheet
DIGITAL SPECIFICATIONS
Table 2.
Parameter
Test ^{AD9235BRU/BCP-20 AD9235BRU/BCP-40 AD9235BRU/BCP-65}
Temp Level Min Typ Max Min Typ Max Min Typ Max Unit
LOGIC INPUTS
High Level Input Voltage
Full IV
2.0
2.0
2.0
V
Low Level Input Voltage
Full IV
0.8
0.8
0.8 V
High Level Input Current
Full IV
–10
+10 –10
+10 –10
+10 µA
Low Level Input Current
Full IV
–10
+10 –10
+10 –10
+10 µA
Input Capacitance
Full V
2
2
2
pF
LOGIC OUTPUTS¹
DRVDD = 3.3 V
High-Level Output Voltage Full IV
3.29
3.29
3.29
V
(IOH = 50 µA)
High-Level Output Voltage Full IV
3.25
3.25
3.25
V
(IOH = 0.5 mA)
Low-Level Output Voltage Full IV
0.2
0.2
0.2 V
(IOL = 1.6 mA)
Low-Level Output Voltage Full IV
0.05
0.05
0.05 V
(IOL = 50 µA)
DRVDD = 2.5 V
High-Level Output Voltage Full IV
2.49
2.49
2.49
V
(IOH = 50 µA)
High-Level Output Voltage Full IV
2.45
2.45
2.45
V
(IOH = 0.5 mA)
Low-Level Output Voltage Full IV
0.2
0.2
0.2 V
(IOL = 1.6 mA)
Low-Level Output Voltage Full IV
0.05
0.05
0.05 V
(IOL = 50 µA)
1 _{Output voltage levels measured with 5 pF load on each output.}
SWITCHING SPECIFICATIONS
Table 3.
Parameter
Test ^{AD9235BRU/BCP-20}
Temp Level Min Typ Max
CLOCK INPUT PARAMETERS
Maximum Conversion Rate
Full VI
20
Minimum Conversion Rate
Full V
1
CLK Period
CLK Pulse-Width High¹
CLK Pulse-Width Low¹
Full V
50.0
Full V
15.0
Full V
15.0
DATA OUTPUT PARAMETERS
Output Delay² (tPD)
Full V
3.5
Pipeline Delay (Latency)
Full V
7
Aperture Delay (tA)
Full V
1.0
Aperture Uncertainty Jitter (tJ) Full V
0.5
Wake-Up Time³
Full V
3.0
OUT-OF-RANGE RECOVERY TIME Full V
1
AD9235BRU/BCP-40
Min Typ Max
40
1
25.0
8.8
8.8
3.5
7
1.0
0.5
3.0
1
AD9235BRU/BCP-65
Min Typ Max
65
1
15.4
6.2
6.2
3.5
7
1.0
0.5
3.0
2
Unit
MSPS
MSPS
ns
ns
ns
ns
Cycles
ns
ps rms
ms
Cycles
1 _{For the AD9235-65 model only, with duty cycle stabilizer enabled. DCS function not applicable for -20 and -40 models.}
2 _{Output delay is measured from CLK 50% transition to DATA 50% transition, with 5 pF load on each output.}
3 _{Wake-up time is dependent on value of decoupling capacitors; typical values shown with 0.1 µF and 10 µF capacitors on REFT and REFB.}
Rev. D | Page 4 of 40