AD8368_07 Datasheet, PDF (4/20 Pages) Analog Devices – 800 MHz, Linear-in-dB VGA with AGC Detector

AD8368
VS = 5 V, TA = 25°C, system impedance Z0 = 50 Ω, VMODE = 5 V, RF input = 140 MHz, unless otherwise noted.
Table 2.
Parameter
SQUARE LAW DETECTOR (DETI, DETO)
Output Setpoint
DETI DC Bias Level to ICOM
DETI Impedance
DETO Output Range¹
AGC Step Response
MODE CONTROL INTERFACE (MODE)
MODE Threshold
MODE Input Bias Current
POWER INTERFACE (VPSI, VPSO)
Supply Voltage
Total Supply Current
Disable Current
ENABLE INTERFACE (ENBL)
Enable Threshold
Enable Response Time
ENBL Input Bias Current
Min Typ Max Unit Conditions
−11
dBm OUTP connected to DETI
VS/2
V
710
Ω
0.6
pF
0.1
VS/2 V
30
μs
For −6 dB input power step (CDETO = 1 nF)
3.5
V
50
μA
4.5 5
5.5 V
60
mA ENBL high
2
mA ENBL low
2.5
V
1.5
μs
3
μs
150 μA
Time delay following off-to-on transition until
output reaches 90% of final value
Time delay following on-to-off transition until
supply current is less than 5 mA
VENBL = 5 V
1 _{Refer to AGC Operation section.}
Rev. A | Page 4 of 20