AD8300 Datasheet, PDF (4/8 Pages) Analog Devices – +3 Volt, Serial Input Complete 12-Bit DAC

AD8300
ABSOLUTE MAXIMUM RATINGS^*
V_DD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +7 V
Logic Inputs to GND . . . . . . . . . . . . . . . . . . . . . –0.3 V, +7 V
V_OUT to GND . . . . . . . . . . . . . . . . . . . . . . –0.3 V, V_DD + 0.3 V
I_OUT Short Circuit to GND . . . . . . . . . . . . . . . . . . . . . . 50 mA
Package Power Dissipation . . . . . . . . . . . . . (T_J Max – T_A)/θ_JA
Thermal Resistance θ_JA
8-Lead Plastic DIP Package (N-8) . . . . . . . . . . . . . 103°C/W
8-Lead SOIC Package (SO-8) . . . . . . . . . . . . . . . . 158°C/W
Maximum Junction Temperature (T_J Max) . . . . . . . . . . 150°C
Operating Temperature Range . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . . +300°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
ORDERING GUIDE
Model
INL Temp
Package
Description
Package
Options
AD8300AN ± 2
AD8300AR ± 2
XIND
XIND
8-Lead P-DIP N-8
8-Lead SOIC SO-8
NOTES
XIND = –40°C to +85°C.
The AD8300 contains 630 transistors. The die size measures 72 mil × 65 mil.
PIN CONFIGURATIONS
SO-8
Plastic DIP
1
8
VDD 1
8 V_OUT
CS 2 AD8300 7 GND
4
5
CLK 3 TOP VIEW 6 CLR
(Not to Scale)
SDI 4
5 LD
Pin #
1
2
3
4
5
6
7
8
Name
V_DD
CS
CLK
SDI
LD
CLR
GND
V_OUT
PIN DESCRIPTIONS
Function
Positive power supply input. Specified range
of operation +2.7 V to +5.5 V.
Chip Select, active low input. Disables shift
register loading when high. Does not affect
LD operation.
Clock input, positive edge clocks data into
shift register.
Serial Data Input, input data loads directly
into the shift register, MSB first.
Load DAC register strobes, active low.
Transfers shift register data to DAC register.
See Truth Table I for operation. Asynchro-
nous active low input.
Resets DAC register to zero condition.
Asynchronous active low input.
Analog and Digital Ground.
DAC voltage output, 2.0475 V full scale
with 0.5 mV per bit. An internal tempera-
ture stabilized reference maintains a fixed
full-scale voltage independent of time, tem-
perature and power supply variations.
SDI
CLK
CS
LD
D11 D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
t LD1
t CSS
t CSH
t LD2
SDI
CLK
LD
CLR
FS
V_OUT
ZS
t_DS
t CL
t_DH
t _CH
t LDW
tS
Figure 3. Timing Diagram
t CLRW
tS
؎1LSB
ERROR BAND
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD8300 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
–4–
REV. A