AD7564 Datasheet, PDF(4/16 Page) Analog Devices – LC2MOS +3.3 V/+5 V, Low Power, Quad 12-Bit DAC

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

AD7564 Datasheet, PDF (4/16 Pages) Analog Devices – LC2MOS +3.3 V/+5 V, Low Power, Quad 12-Bit DAC

◁

AD7564

AC Performance Characteristics

Normal Mode

(VDD = +4.75 V to +5.25 V; VIOUT1 = VIOUT2 = AGND = 0 V. VREF = 6 V rms, 1 kHz sine wave; DAC output op amp is

AD843; TA = TMIN to TMAX, unless otherwise noted. These characteristics are included for Design Guidance and are

not subject to test.)

Parameter

B Grade Units

Test Conditions/Comments

DYNAMIC PERFORMANCE

Output Voltage Settling Time 550

Digital-to-Analog Glitch Impulse 35

Multiplying Feedthrough Error â70

Output Capacitance

Channel-to-Channel Isolation â76

Digital Crosstalk

Digital Feedthrough

Total Harmonic Distortion

â83

Output Noise Spectral Density

@ 1 kHz

ns typ

nV-s typ

dB max

pF max

dB typ

nV-s typ

dB typ

To 0.01% of Full-Scale Range. DAC Latch Alternately Loaded

with All 0s and All 1s

Measured with VREF = 0 V. DAC Register Alternately Loaded

with All 0s and All 1s

VREF = 20 V p-p, 10 kHz Sine Wave. DAC Latch Loaded

with All 0s

All 1s Loaded to DAC

All 0s Loaded to DAC

Feedthrough from Any One Reference to the Others with

20 V p-p, 10 kHz Sine Wave Applied

Effect of All 0s to All 1s Code Transition on Nonselected DACs

Feedthrough to Any DAC Output with FSIN High and Square

Wave Applied to SDIN and SCLK

VREF = 6 V rms, 1 kHz Sine Wave

nV/âHz typ All 1s Loaded to the DAC. VREF = 0 V. Output Op Amp Is

ADOP07

AC Performance Characteristics

Biased Mode

(VDD = +3 V to +5.5 V; VIOUT1 = VIOUT2 = 1.23 V; AGND = 0 V. VREF = 1 kHz, 2.45 V p-p, sine wave biased at 1.23 V; DAC

output op amp is AD820; TA = TMIN to TMAX, unless otherwise noted. These characteristics are included for Design

Guidance and are not subject to test.)

Parameter

A Grade Units

Test Conditions/Comments

DYNAMIC PERFORMANCE

Output Voltage Settling Time 3.5

Digital to Analog Glitch Impulse 35

Multiplying Feedthrough Error â70

Output Capacitance

100

Digital Feedthrough

Total Harmonic Distortion

â76

Output Noise Spectral Density

@ 1 kHz

Âµs typ

nV-s typ

dB max

pF max

nV-s typ

dB typ

To 0.01% of Full-Scale Range. VREF = 0 V. DAC Latch Alter-

nately Loaded with all 0s and all 1s.

Measured with VIOUT2 = 0 V and VREF = 0 V. DAC Register Alter-

nately Loaded with all 0s and all 1s.

DAC Latch Loaded with all 0s.

All 1s Loaded to DAC

All 0s Loaded to DAC

Feedthrough to Any DAC Output with FSIN HIGH and a Square

Wave Applied to SDIN and CLKIN

nV/âHz typ All 1s Loaded to DAC. VIOUT2 = 0 V; VREF = 0 V

â4â

REV. A

▷