AD5755-1 Datasheet, PDF (4/34 Pages) Analog Devices – Quad Channel, 16-Bit, Serial Input, 4-20mA & Voltage Output DAC, Dynamic Power Control, HART Connectivity

AD5755-1
Preliminary Technical Data
Parameter¹
Min
Typ Max Unit
Test Conditions/Comments
DC Output Impedance
0.3
Ω
DC PSRR
TBD
µV/V
TBD
µV/V
CURRENT OUTPUT
Output Current Ranges
0
24
mA
0
20
mA
4
20
mA
Resolution
16
Bits
ACCURACY (External R_Set)
Total Unadjusted Error (TUE)
−0.05
+0.05 % FSR
TUE TC²
−0.02
−TBD
TBD +0.02
±TB +TBD
D
% FSR
ppm
T_A = 25°C
Relative Accuracy (INL)
−0.006
+0.006 % FSR
Differential Nonlinearity (DNL)
−1
+1
LSB
Guaranteed monotonic
Offset Error
−0.035
+0.035 % FSR
Offset Error Drift²
−TBD
TBD +TBD
±TB
D
% FSR
T_A = 25°C
ppm FSR/°C
Gain Error
−0.02
+0.02 % FSR
Gain TC²
−TBD
−TBD
TBD +TBD
+TBD
% FSR
T_A = 25°C
ppm FSR/°C
Full-Scale Error
−0.05
+0.05 % FSR
Full-Scale TC²
−TBD
−TBD
TBD +TBD
+TBD
% FSR
T_A = 25°C
ppm FSR/°C
ACCURACY (Internal R_Set)
Total Unadjusted Error (TUE)
−0.12
+0.12 % FSR
TUE TC²
−0.02
−TBD
TBD +0.02
±TB +TBD
D
% FSR
ppm
T_A = 25°C
Relative Accuracy (INL)
−0.006
+0.006 % FSR
Differential Nonlinearity (DNL)
−1
+1
LSB
Guaranteed monotonic
Offset Error
−0.04
+0.04 % FSR
Offset Error Drift²
−TBD
TBD +TBD
±TB
D
% FSR
T_A = 25°C
ppm FSR/°C
Gain Error
−0.08
+0.08 % FSR
Gain TC²
−TBD
−TBD
TBD +TBD
+TBD
% FSR
T_A = 25°C
ppm FSR/°C
Full-Scale Error
−0.12
+0.12 % FSR
Full-Scale TC²
−TBD
−TBD
TBD +TBD
+TBD
% FSR
T_A = 25°C
ppm FSR/°C
OUTPUT CHARACTERISTICS²
Current Loop Compliance Voltage
TBD AVDD - V max
2.5
Output Current Drift vs. Time
±TB
ppm FSR
Drift after 500 hours, T_J = 150°C
D
(this is included in the TUE specifications)
±TB
ppm FSR
Drift after 1000 hours, T_J = 150°C
D
(this is included in the TUE specifications)
Rev. PrD | Page 4 of 34