AD5624_15 Datasheet, PDF (4/24 Pages) Analog Devices – 2.7 V to 5.5 V, 450 A, Rail-to-Rail Output, Quad, 12-/16-Bit nanoDACs

AD5624/AD5664
Parameter
POWER REQUIREMENTS
VDD
IDD (Normal Mode)⁴
VDD = 4.5 V to 5.5 V
VDD = 2.7 V to 3.6 V
IDD (All Power-Down
Modes)⁵
VDD = 4.5 V to 5.5 V
VDD = 2.7 V to 3.6 V
A Grade¹
B Grade¹
Min Typ Max Min Typ Max Unit
2.7
5.5
2.7
5.5
V
0.45 0.9
0.44 0.85
0.45 0.9
mA
0.44 0.85
mA
0.48 1
0.2
1
0.48 1
μA
0.2
1
μA
Conditions/Comments
VIH = VDD, VIL = GND
VIH = VDD, VIL = GND
1 _{Temperature range: A grade and B grade: −40°C to +105°C.}
2 _{Linearity calculated using a reduced code range: AD5664 (Code 512 to Code 65,024); AD5624 (Code 32 to Code 4064); output unloaded.}
3 _{Guaranteed by design and characterization, not production tested.}
4 _{Interface inactive. All DACs active. DAC outputs unloaded.}
5 _{All DACs powered down.}
AC CHARACTERISTICS
VDD = 2.7 V to 5.5 V; RL = 2 kΩ to GND; CL = 200 pF to GND; VREF = VDD; all specifications TMIN to TMAX, unless otherwise noted.¹
Table 3.
Parameter^{2, 3}
Min
Typ
Max
Unit
Output Voltage Settling Time
AD5664
4
7
μs
AD5624
3
4.5
μs
Slew Rate
1.8
V/μs
Digital-to-Analog Glitch Impulse
10
nV-s
Digital Feedthrough
0.1
nV-s
Reference Feedthrough
−90
dBs
Digital Crosstalk
0.1
nV-s
Analog Crosstalk
1
nV-s
DAC-to-DAC Crosstalk
1
nV-s
Multiplying Bandwidth
340
kHz
Total Harmonic Distortion
−80
dB
Output Noise Spectral Density
120
nV/√Hz
100
nV/√Hz
Output Noise
15
μV p-p
Conditions/Comments
¼ to ¾ scale settling to ±2 LSB
¼ to ¾ scale settling to ±0.5 LSB
1 LSB change around major carry
VREF = 2 V ± 0.1 V p-p, frequency 10 Hz to 20 MHz
VREF = 2 V ± 0.1 V p-p
VREF = 2 V ± 0.1 V p-p, frequency = 10 kHz
DAC code = midscale, 1 kHz
DAC code = midscale, 10 kHz
0.1 Hz to 10 Hz
1 _{Guaranteed by design and characterization, not production tested.}
2 _{Temperature range: −40°C to +105°C; typical at 25°C.}
3 _{See the Terminology section.}
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