AD9779BSVZ Datasheet, PDF (38/56 Pages) Analog Devices – Dual 12-/14-/16-Bit, 1 GSPS, Digital-to-Analog Converters

AD9776/AD9778/AD9779
(Register 0x09, Bits<2:0>) should be set to 111. The PLL control
voltage (Register 0x0A, Bits<7:5>) is read back and is propor-
tional to the dc voltage at the internal loop filter output. With
the PLL bias settings given in this section, the readback from
the PLL control voltage should typically be 010, or possibly 001
or 011. Anything outside of this range indicates that the PLL is
not operating correctly.
60
56
52
48
44
40
36
32
28
24
20
16
12
8
4
0
F_VCO (MHz)
Figure 75. Typical PLL Band Select vs. Frequency at 25°C
external resistor is 10 kΩ, which sets up an IREFERENCE in the
resistor of 120 μA, which in turn provides a DAC output full-
scale current of 20 mA. Because the gain error is a linear
function of this resistor, a high precision resistor improves gain
matching to the internal matching specification of the devices.
Internal current mirrors provide a current-gain scaling, where
I DAC or Q DAC gain is a 10-bit word in the SPI port register
(Register 0x0A, Register 0x0B, Register 0x0E, and Register 0x0F).
The default value for the DAC gain registers gives an IFS of
approximately 20 mA, where IFS is equal to
1.2 V
R
×
⎜⎛
⎝
27
12
+
⎜⎝⎛
6
1024
×
DAC
gain _{⎟⎠⎞} ⎟⎠⎞
× 32
0.1μF
VREF
I120
10kΩ
35
AD9779
I DAC GAIN
1.2V BAND GAP
CURRENT
SCALING
I DAC
DAC FULL-SCALE
REFERENCE
CURRENT
Q DAC GAIN
Q DAC
Figure 77. Reference Circuitry
60
30
56
52
25
48
44
40
20
36
32
15
28
24
10
20
16
5
12
8
4
0
0
200
400
600
800
1000
0
DAC GAIN CODE
F_VCO (MHz)
Figure 76. Typical PLL Band Select vs. Frequency over Temperature
Figure 78. IFS vs. DAC Gain Code
Application of Auxiliary DACs in Single Sideband
Transmitter
The AD977x has an autosearch feature that determines the
optimal settings for the PLL. To enable the autosearch mode, set
Register 0x08, Bits<7:2> to 11111b, and read back the value
from Register 0x08, Bits<7:2>. Autosearch mode is intended to
find the optimal PLL settings only, after which the same settings
should be applied in manual mode. It is not recommended that
the PLL be set to autosearch mode during regular operation.
Two auxiliary DACs are provided on the AD977x. The full-scale
output current on these DACs is derived from the 1.2 V band
gap reference and external resistor. The gain scale from the ref-
erence amplifier current IREFERENCE to the auxiliary DAC reference
current is 16.67 with the auxiliary DAC gain set to full scale
(10-bit values, SPI Register 0x0D and SPI Register 0x11), this
gives a full-scale current of approximately 2 mA for auxiliary
FULL-SCALE CURRENT GENERATION
Internal Reference
Full-scale current on the I DAC and Q DAC can be set from
8.66 mA to 31.66 mA. Initially, the 1.2 V band gap reference is
used to set up a current in an external resistor connected to
I120 (Pin 75). A simplified block diagram of the reference
circuitry is shown in Figure 77. The recommended value for the
DAC1 and auxiliary DAC2. The auxiliary DAC outputs are not
differential. Only one side of the auxiliary DAC (P or N) is
active at one time. The inactive side goes into a high impedance
state (>100 kΩ). In addition, the P or N outputs can act as
current sources or sinks. The control of the P and N side for
both auxiliary DACs is via Register 0x0E and Register 0x10,
Bits<7:6>. When sourcing current, the output compliance
Rev. A | Page 38 of 56