ADSP-21061L_15 Datasheet, PDF (37/52 Pages) Analog Devices – Commercial Grade SHARC DSP Microcomputer

ADSP-21061/ADSP-21061L
CLKIN
DMARx
DMAGx
t_SDRLC
t_WDR
t_DMARLL
t_DDGL
t_SDRHC
t_DMARH
t_HDGC
t_WDGL
t_WDGH
TRANSFERS BETWEEN ADSP-2106x
INTERNAL MEMORY AND EXTERNAL DEVICE
DATA
(FROM ADSP-2106x TO EXTERNAL DEVICE)
DATA
(FROM EXTERNAL DEVICE TO ADSP-2106x)
TRANSFERS BETWEEN EXTERNAL DEVICE AND
EXTERNAL MEMORY* (EXTERNAL HANDSHAKE MODE)
t_VDATDGH
t_DATRDGH
t_DATDRH
t_SDATDGL
t_HDATIDG
t_DGWRL
WR
(EXTERNAL DEVICE TO EXTERNAL MEMORY)
t_DGWRH
t_DGWRR
RD
(EXTERNAL MEMORY TO EXTERNAL DEVICE)
ADDR
MSx, SW
t_DGRDL
t_DADGH
t_DRDGH
*MEMORY READ BUS MASTER, MEMORY WRITE BUS MASTER, OR SYNCHRONOUS READ/WRITE BUS MASTER
TIMING SPECIFICATIONS FOR ADDR31–0, RD, WR, SW MS3–0, AND ACK ALSO APPLY HERE.
Figure 23. DMA Handshake
t_DGRDR
t_DDGHA
Rev. D | Page 37 of 52 | May 2013