AT45DB081D_13 Datasheet, PDF (35/53 Pages) Analog Devices – 8-megabit 2.5V or 2.7V DataFlash

19. Input Test Waveforms and Measurement Levels
AC
DRIVING
LEVELS
2.4V
0.45V
t_R, t_F < 2 ns (10% to 90%)
1.5V
AC
MEASUREMENT
LEVEL
20. Output Test Load
DEVICE
UNDER
TEST
30pF
AT45DB081D
21. AC Waveforms
Six different timing waveforms are shown on page 36. Waveform 1 shows the SCK signal being
low when CS makes a high-to-low transition, and waveform 2 shows the SCK signal being high
when CS makes a high-to-low transition. In both cases, output SO becomes valid while the
SCK signal is still low (SCK low time is specified as t_WL). Timing waveforms 1 and 2 conform to
RapidS serial interface but for frequencies up to 66MHz. Waveforms 1 and 2 are compatible with
SPI Mode 0 and SPI Mode 3, respectively.
Waveform 3 and waveform 4 illustrate general timing diagram for RapidS serial interface. These
are similar to waveform 1 and waveform 2, except that output SO is not restricted to become
valid during the t_WL period. These timing waveforms are valid over the full frequency range (max-
imum frequency = 66MHz) of the RapidS serial case.
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