AD8450 Datasheet, PDF (35/41 Pages) Analog Devices – Precision Analog Front End and Controller for Battery Test/Formation Systems

Data Sheet
AD8450
Table 8. AD8450-EVALZ Test Switches and Their Functions
Switch
ISGN
BVGN
IS_REF
BV_REF
MODE
RUN_TEST1
RUN_TEST2
Function
PGIA gain switch
PGDA gain switch
Selects between offset options for
the PGIA
Selects input source option for
the BVREFH pin
Selects charge or discharge mode
Configures the ISET and VSET
inputs to test the integrators.
Configures the ISET and VSET
outputs to test the integrators.
Operation
The ISGN switch selects one of four fixed gain values: 26, 66, 133, or 200.
The BVGN switch selects one of four fixed gain values: 0.2, 0.27, 0.4, or 0.8.
NORM: 0 V reference.
20mV: offsets the PGIA reference by 20 mV.
EXT: An externally supplied reference voltage is applied to the PGIA.
NORM: Overvoltage (OV) reference applied.
5mV: The BVDA is offset by 5 mV.
EXT: An externally supplied reference voltage is applied to the BVDA.
The MODE switch selects CHG (logic high) or DISCH (logic low).
RUN: The ISET and VSET inputs are connected to SMA connectors ISET
and VSET.
TEST: connectors the ISET and VSET inputs to the 2.5 V reference.
RUN: configures the ISET and VSET outputs as integrators.
TEST: configures the ISET and VSET outputs as followers.
1 _{N/A means not applicable.}
Table 9. AD8450-EVALZ SMA Connector Functions
Connector
Function
ISVP
Input from the battery current sensor to the PGIA positive input.
ISVN
Input from the battery current sensor to the PGIA negative input.
BVP
Input from the battery positive voltage terminal to the PGDA positive input.
BVN
Input from the battery negative voltage terminal to the PGDA negative input.
ISET
Input to the AD8450 ISET pin.
VSET
Input to the AD8450 VSET pin.
VCTRL
AD8450 control voltage output to the PWM or analog power supply COMP input.
CS_BUS
AD8450 current sharing input/output bus.
Default
Position¹
User select
N/A
NORM
NORM
CHG
RUN
RUN
PGIA in an Application
The differential inputs of the PGIA assume the use of a high-
side current shunt in series with the battery. To connect the
evaluation board in an application, simply connect the ISVP
and ISVN to the positive and negative shunt connections. Be
sure that both inputs are floating (ungrounded). The ISVP and
ISVN inputs tolerate the full AVCC common-mode voltage
applied to the board.
Simple Offset Test
Short the PGIA inputs from TPISVP to TPISVN to one of the
black ground loops. The ISMEA output is 0 V ± the residual
offset voltage multiplied by the gain. Move the IS_REF switch
to the 20 mV position to increase ISMEA by 20 mV.
Offset in an Application
In certain instances, the system operates with various ground
voltage levels. Although the PGIA is differential and floating, it
may be advantageous to refer the PGIA to a ground at or near
the battery load.
PGDA and Offset
Simple Test
The PGDA has four gain options (0.8, 0.4, 0.27, and 0.2) selected
with the four-position BVGN slide switch. Set the BV_REF
switch to the NORM position. Test the PGDA amplifier in the
same manner as PGIA. Apply 1 V dc between TPBVP and TPBVN.
Measure the output voltages at TPBVMEA. The output voltages
are 0.8 V, 0.4 V, 0.27 V, and 0.2 V, respectively, at the four BVGN
switch positions.
PGDA in an Application
For connection to an application, simply connect the input
terminal across the battery. It is good practice to take advantage of
the differential input to achieve the most accurate measurements.
PGDA Offset
The BV_REF offset works just the same as the IS_REF except
that the fixed offset is 5 mV. Simply use the BV_REF switch to
select the option. For an external offset reference, move the
BV_REF switch to EXT and connect a wire from the TPBREFL
and TPBREFH test loops to the desired reference points.
Rev. B | Page 35 of 41