ADT7316_15 Datasheet, PDF (34/44 Pages) Analog Devices – 0.5C Accurate Digital Temperature Sensor and Quad Voltage Output 12-/10-/8-Bit DACs

ADT7316/ADT7317/ADT7318
External TLOW Limit Register (Read/Write) [Address 0x28]
This limit register is an 8-bit, read/write register that stores the
twos complement of the external temperature lower limit that
causes an interrupt and activates the INT/INT output (if enabled).
For this to happen, the measured external temperature value
has to be more negative than or equal to the value in this regis-
ter. As it is an 8-bit register, the temperature resolution is 1°C.
The default value is 0°C.
Positive Temperature = Limit Register Code (dec)
Negative Temperature = Limit Register Code (dec) – 256
Table 57. External TLOW Limit
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
0¹
0¹
0¹
0¹
0¹
0¹
0¹
0¹
1 _{Default settings at power-up.}
Device ID Register (Read-Only) [Address 0x4D]
This 8-bit, read-only register indicates which part the device is
in the model range. ADT7316 = 0x01, ADT7317 = 0x09, and
ADT7318 = 0x05.
Manufacturer’s ID Register (Read-Only) [Address 0x4E]
This register contains the manufacturers identification number.
Analog Devices, Inc.’s ID is 0x41.
Silicon Revision Register (Read-Only) [Address 0x4F]
This register is divided into the 4 LSBs representing the stepping
and the 4 MSBs representing the version. The stepping contains
the manufacturer’s code for minor revisions or steppings to the
silicon. The version is the ADT7316/ADT7317/ ADT7318
version number.
SPI Lock Status Register (Read-Only) [Address 0x7F]
Bit D0 (LSB) of this read-only register indicates whether the SPI
interface is locked. Writing to this register causes the device to
malfunction. The default value is 0x00.
0 = I²C interface.
1 = SPI interface selected and locked.
ADT7316/
ADT7317/
ADT7318
CS
V_DD
V_DD
10kΩ
10kΩ
SDA
SCL
I²C ADDRESS = 1001 000
ADD
Figure 48. Typical I²C Interface Connection
ADT7316/
ADT7317/
ADT7318
CS
V_DD
820Ω 820Ω 820Ω
LOCK AND
SELECT SPI
SPI FRAMING
EDGE
DIN
SCLK
DOUT
Figure 49. Typical SPI Interface Connection
Rev. B | Page 34 of 44