ADSP-21XX1111 Datasheet, PDF (34/64 Pages) Analog Devices – ADSP-2100 Family DSP Microcomputers

ADSP-21xx
TIMING PARAMETERS (ADSP-2101/2105/2111/2115/2161/2163)
MEMORY WRITE
Parameter
Switching Characteristic:
t_DW
t_DH
t_WP
t_WDE
t_ASW
Data Setup before WR High
Data Hold after WR High
WR Pulse Width
WR Low to Data Enabled
A0–A13, DMS, PMS Setup before
WR Low
t_DDR Data Disable before WR or RD Low
t_CWR CLKOUT High to WR Low
t_AW A0–A13, DMS, PMS, Setup before WR
Deasserted
t_WRA A0–A13, DMS, PMS Hold after WR
Deasserted
t_WWR WR High to RD or WR Low
13 MHz 13.824 MHz 16.67 MHz 20 MHz 25 MHz
Min Max Min Max Min Max Min Max Min Max Unit
25.5
23.2
17
9.2
8.1
5
30.5
28.2
22
0
0
0
9.2
8.1
5
9.2
8.1
5
14.2 29.2 13.1 28.1 10
35.7
32.2
23
10.2
9.1
6
33.5
31.2
25
12
7
ns
2.5
0
ns
17
12
ns
0
0
ns
2.5
1.5¹
ns
2.5
1.5¹
ns
25 7.5 22.5 5 20 ns
15.5
8
ns
3.5
1
ns
20
15
ns
Parameter
Frequency Dependency
(CLKIN ≤ 25 MHz)
Min
Max
Switching Characteristic:
t_DW Data Setup before WR High
t_DH Data Hold after WR High
t_WP WR Pulse Width
t_WDE WR Low to Data Enabled
t_ASW A0–A13, DMS, PMS Setup before WR Low
t_DDR Data Disable before WR or RD Low
t_CWR CLKOUT High to WR Low
t_AW A0–A13, DMS, PMS, Setup before WR
Deasserted
t_WRA A0–A13, DMS, PMS Hold after WR
Deasserted
t_WWR WR High to RD or WR Low
0.5t_CK – 13 + w
0.25t_CK – 10
0.5t_CK – 8 + w
0
0.25t_CK – 10¹
0.25t_CK – 10¹
0.25t_CK – 5
0.75t_CK – 22 + w
0.25t_CK – 9
0.5t_CK – 5
NOTES
1_{For 25 MHz only the minimum frequency dependency formula for t ASW and tDDR = (0.25tCK – 8.5).}
w = wait states × t_CK.
CLKOUT
0.25t_CK + 10
A0 – A13
DMS, PMS
WR
D
RD
t_{WR A}
t_{AS W}
t_CWR
t_WP
t_AW
t_DW
t_WDE
t_WWR
t_DH
t_{DD R}
Figure 33. Memory Write
–34–
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
REV. B